summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.txt
diff options
context:
space:
mode:
authorAnimesh Agarwal <animeshagarwal28@gmail.com>2024-07-31 09:51:33 +0300
committerStephen Boyd <sboyd@kernel.org>2024-08-01 00:55:39 +0300
commitb33037a0314798c23be89d103e97f045e4bc8ba9 (patch)
treee3f6a6e80ebd3ae7d3ec8d7d0c48f9a091cc869e /Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.txt
parent8400291e289ee6b2bf9779ff1c83a291501f017b (diff)
downloadlinux-b33037a0314798c23be89d103e97f045e4bc8ba9.tar.xz
dt-bindings: clock: nxp,lpc3220-clk: Convert bindings to DT schema
Convert the NXP LPC32xx Clock Controller bindings to yaml format. Cc: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Animesh Agarwal <animeshagarwal28@gmail.com> Link: https://lore.kernel.org/r/20240731065137.156935-1-animeshagarwal28@gmail.com Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.txt')
-rw-r--r--Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.txt30
1 files changed, 0 insertions, 30 deletions
diff --git a/Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.txt b/Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.txt
deleted file mode 100644
index 20cbca3f41d8..000000000000
--- a/Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.txt
+++ /dev/null
@@ -1,30 +0,0 @@
-NXP LPC32xx Clock Controller
-
-Required properties:
-- compatible: should be "nxp,lpc3220-clk"
-- reg: should contain clock controller registers location and length
-- #clock-cells: must be 1, the cell holds id of a clock provided by the
- clock controller
-- clocks: phandles of external oscillators, the list must contain one
- 32768 Hz oscillator and may have one optional high frequency oscillator
-- clock-names: list of external oscillator clock names, must contain
- "xtal_32k" and may have optional "xtal"
-
-Examples:
-
- /* System Control Block */
- scb {
- compatible = "simple-bus";
- ranges = <0x0 0x040004000 0x00001000>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- clk: clock-controller@0 {
- compatible = "nxp,lpc3220-clk";
- reg = <0x00 0x114>;
- #clock-cells = <1>;
-
- clocks = <&xtal_32k>, <&xtal>;
- clock-names = "xtal_32k", "xtal";
- };
- };