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authorKevin Hilman <khilman@linaro.org>2013-12-18 04:23:49 +0400
committerKevin Hilman <khilman@linaro.org>2013-12-18 04:43:34 +0400
commita9434e96d9f089e778b440217f815c8e85daf317 (patch)
treea8fbebcc67b2b6c992b249d5c29035f9d6a5b309 /Documentation/devicetree/bindings/arm/hisilicon
parent524b7df9fdebe96f13977ab880df49a3b74dc1a1 (diff)
downloadlinux-a9434e96d9f089e778b440217f815c8e85daf317.tar.xz
ARM: hi3xxx: add smp support
Enable SMP support on hi3xxx platform Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Tested-by: Zhang Mingjun <zhang.mingjun@linaro.org> Tested-by: Li Xin <li.xin@linaro.org> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> [khilman: fix checkpatch errors] Signed-off-by: Kevin Hilman <khilman@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/hisilicon')
-rw-r--r--Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt26
1 files changed, 26 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
index 21a73363e019..8c7a4653508d 100644
--- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
+++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
@@ -4,3 +4,29 @@ Hisilicon Platforms Device Tree Bindings
Hi4511 Board
Required root node properties:
- compatible = "hisilicon,hi3620-hi4511";
+
+Hisilicon system controller
+
+Required properties:
+- compatible : "hisilicon,sysctrl"
+- reg : Register address and size
+
+Optional properties:
+- smp-offset : offset in sysctrl for notifying slave cpu booting
+ cpu 1, reg;
+ cpu 2, reg + 0x4;
+ cpu 3, reg + 0x8;
+ If reg value is not zero, cpun exit wfi and go
+- resume-offset : offset in sysctrl for notifying cpu0 when resume
+- reboot-offset : offset in sysctrl for system reboot
+
+Example:
+
+ /* for Hi3620 */
+ sysctrl: system-controller@fc802000 {
+ compatible = "hisilicon,sysctrl";
+ reg = <0xfc802000 0x1000>;
+ smp-offset = <0x31c>;
+ resume-offset = <0x308>;
+ reboot-offset = <0x4>;
+ };