summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorMarek Vasut <marex@denx.de>2023-10-15 23:01:24 +0300
committerShawn Guo <shawnguo@kernel.org>2023-11-27 05:05:08 +0300
commitf6862104ff3a56656edefd003bf1be6d89fabda4 (patch)
tree07b553f8ee490b4a37e0ccc95abbbdf8b25d2bc0
parent5946b71eacf7fae680887c7de6bbc4f470108280 (diff)
downloadlinux-f6862104ff3a56656edefd003bf1be6d89fabda4.tar.xz
arm64: dts: imx8mp: Describe M24C32-D write-lockable page in DH i.MX8MP DHCOM DT
The i.MX8MP DHCOM SoM production rev.200 is populated with M24C32-D EEPROMs which have Additional Write lockable page at separate I2C address. Describe the page in DT to make it available. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-rw-r--r--arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
index d8963f32ec84..4ae4fdab461e 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
@@ -420,6 +420,18 @@
reg = <0x53>;
};
+ eeprom0wl: eeprom@58 {
+ compatible = "atmel,24c32d-wl"; /* M24C32-D WL page of 0x50 */
+ pagesize = <32>;
+ reg = <0x58>;
+ };
+
+ eeprom1wl: eeprom@5b {
+ compatible = "atmel,24c32d-wl"; /* M24C32-D WL page of 0x53 */
+ pagesize = <32>;
+ reg = <0x5b>;
+ };
+
ioexp: gpio@74 {
compatible = "nxp,pca9539";
reg = <0x74>;