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authorClément Léger <clement.leger@bootlin.com>2024-05-13 10:25:18 +0300
committerGeert Uytterhoeven <geert+renesas@glider.be>2024-05-28 12:48:03 +0300
commitf50e5ddc3ff66434d011b031af3cdbac3d80bd82 (patch)
treed7e9eb83cf22f72467db9b72d8d84ce152d7c809
parentb4944dc7b7935a022be7f777d5cf47e0c1becc96 (diff)
downloadlinux-f50e5ddc3ff66434d011b031af3cdbac3d80bd82.tar.xz
ARM: dts: renesas: r9a06g032: Describe GMAC1
The r9a06g032 SoC of the RZ/N1 family features two GMAC devices named GMAC1/2, that are based on Synopsys cores. GMAC1 is connected to a RGMII/RMII converter that is already described in this device tree. Signed-off-by: Clément Léger <clement.leger@bootlin.com> [rgantois: commit log] Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Romain Gantois <romain.gantois@bootlin.com> Link: https://lore.kernel.org/r/20240513-rzn1-gmac1-v7-7-6acf58b5440d@bootlin.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-rw-r--r--arch/arm/boot/dts/renesas/r9a06g032.dtsi18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/renesas/r9a06g032.dtsi b/arch/arm/boot/dts/renesas/r9a06g032.dtsi
index 45f60eeeaaa1..466077a8f0ac 100644
--- a/arch/arm/boot/dts/renesas/r9a06g032.dtsi
+++ b/arch/arm/boot/dts/renesas/r9a06g032.dtsi
@@ -316,6 +316,24 @@
data-width = <8>;
};
+ gmac1: ethernet@44000000 {
+ compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac";
+ reg = <0x44000000 0x2000>;
+ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
+ clocks = <&sysctrl R9A06G032_HCLK_GMAC0>;
+ clock-names = "stmmaceth";
+ power-domains = <&sysctrl>;
+ snps,multicast-filter-bins = <256>;
+ snps,perfect-filter-entries = <128>;
+ tx-fifo-depth = <2048>;
+ rx-fifo-depth = <4096>;
+ pcs-handle = <&mii_conv1>;
+ status = "disabled";
+ };
+
gmac2: ethernet@44002000 {
compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac";
reg = <0x44002000 0x2000>;