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authorLuca Coelho <luciano.coelho@intel.com>2026-04-28 12:48:26 +0300
committerLuca Coelho <luciano.coelho@intel.com>2026-05-05 15:26:52 +0300
commitec8ed54295b7abe431dce248bdcea1bda6c23219 (patch)
treec71bfc1c59f06606fd146f92011a1833d8015600
parent943722d70f2b8fd839e1760a6745136251c428c0 (diff)
downloadlinux-ec8ed54295b7abe431dce248bdcea1bda6c23219.tar.xz
drm/i915: remove HAS_PCH_NOP() dependency from clock gating
intel_pch_init_clock_gating() already handles unsupported PCH types, including PCH_NOP, by doing nothing. Drop the explicit HAS_PCH_NOP() check from the IVB clock gating path and always call the display helper directly. This removes one more direct dependency on display-side PCH macros from intel_clock_gating.c. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://patch.msgid.link/20260428095104.818360-9-luciano.coelho@intel.com Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
-rw-r--r--drivers/gpu/drm/i915/intel_clock_gating.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_clock_gating.c b/drivers/gpu/drm/i915/intel_clock_gating.c
index c27b6f9266b1..86bdeb20f427 100644
--- a/drivers/gpu/drm/i915/intel_clock_gating.c
+++ b/drivers/gpu/drm/i915/intel_clock_gating.c
@@ -31,7 +31,7 @@
#include <drm/intel/mchbar_regs.h>
#include "display/intel_display_clock_gating.h"
-#include "display/intel_display_core.h"
+#include "display/intel_pch.h"
#include "gt/intel_engine_regs.h"
#include "gt/intel_gt.h"
#include "gt/intel_gt_mcr.h"
@@ -290,8 +290,7 @@ static void ivb_init_clock_gating(struct drm_i915_private *i915)
intel_uncore_rmw(&i915->uncore, GEN6_MBCUNIT_SNPCR, GEN6_MBC_SNPCR_MASK,
GEN6_MBC_SNPCR_MED);
- if (!HAS_PCH_NOP(display))
- intel_pch_init_clock_gating(display);
+ intel_pch_init_clock_gating(display);
gen6_check_mch_setup(i915);
}