diff options
| author | Miquel Raynal <miquel.raynal@bootlin.com> | 2026-05-26 17:56:51 +0300 |
|---|---|---|
| committer | Pratyush Yadav <pratyush@kernel.org> | 2026-05-27 15:36:03 +0300 |
| commit | eb403cb56e13d7efd742511c1a92b89dc9db8658 (patch) | |
| tree | 595cb351efac9a3ea7c11e47224ec11c1d10a25b | |
| parent | f468f05f0724cf7f7a993f9805185ea8cc72453c (diff) | |
| download | linux-eb403cb56e13d7efd742511c1a92b89dc9db8658.tar.xz | |
mtd: spi-nor: winbond: Add W25Q01NWxxIM CMP locking support
This chip has support for the locking complement (CMP) feature. Add
the relevant bit to enable it.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Pratyush Yadav <pratyush@kernel.org>
| -rw-r--r-- | drivers/mtd/spi-nor/winbond.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 3eca7baa4d5a..3a3b7f2f1659 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -374,7 +374,8 @@ static const struct flash_info winbond_nor_parts[] = { }, { /* W25Q01NWxxIM */ .id = SNOR_ID(0xef, 0x80, 0x21), - .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP, + .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | + SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, }, { /* W25Q02NWxxIM */ .id = SNOR_ID(0xef, 0x80, 0x22), |