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| author | Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> | 2026-01-12 05:12:22 +0300 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2026-02-23 19:44:57 +0300 |
| commit | e7c8eb1646db5d967d77ee67793dd95a2c5ff451 (patch) | |
| tree | a6ba9ce94d133b69c1d1859d336aa6c4d0bcf862 | |
| parent | e2e0d2f3dab4e9838cfe3d94a5cb42aa7b51fddb (diff) | |
| download | linux-e7c8eb1646db5d967d77ee67793dd95a2c5ff451.tar.xz | |
clk: qcom: dispcc-glymur: use RCG2 ops for DPTX1 AUX clock source
The clk_dp_ops are supposed to be used for DP-related clocks with a
proper MND divier. Use shared RCG2 ops for dptx1_aux_clk_src, the same
as all other DPTX AUX clocks in this driver.
Fixes: b4d15211c408 ("clk: qcom: dispcc-glymur: Add support for Display Clock Controller")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260112-dp-aux-clks-v1-1-456b0c11b069@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| -rw-r--r-- | drivers/clk/qcom/dispcc-glymur.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/qcom/dispcc-glymur.c b/drivers/clk/qcom/dispcc-glymur.c index c1facd4e80f2..94053452e871 100644 --- a/drivers/clk/qcom/dispcc-glymur.c +++ b/drivers/clk/qcom/dispcc-glymur.c @@ -417,7 +417,7 @@ static struct clk_rcg2 disp_cc_mdss_dptx1_aux_clk_src = { .parent_data = disp_cc_parent_data_1, .num_parents = ARRAY_SIZE(disp_cc_parent_data_1), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_dp_ops, + .ops = &clk_rcg2_shared_ops, }, }; |