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| author | Matthias Kaehlcke <mka@chromium.org> | 2018-07-31 21:59:13 +0300 |
|---|---|---|
| committer | Andy Gross <andy.gross@linaro.org> | 2018-09-13 22:36:11 +0300 |
| commit | e704472616d7e185b839991b611a77711dbb22e3 (patch) | |
| tree | f68751baf7478f83f4e7708240ab798a0ded1ffa | |
| parent | 40019e8452fe76867bdb2e7d5ca9f085fe0cd16b (diff) | |
| download | linux-e704472616d7e185b839991b611a77711dbb22e3.tar.xz | |
dt-bindings: thermal: qcom-spmi-temp-alarm: Fix documentation of 'reg'
The documentation claims that the 'reg' property consists of two values,
the SPMI address and the length of the controller's registers. However
the SPMI bus to which it is added specifies "#size-cells = <0>;". Remove
the controller register length from the documentation of the field and the
example.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
| -rw-r--r-- | Documentation/devicetree/bindings/thermal/qcom-spmi-temp-alarm.txt | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/thermal/qcom-spmi-temp-alarm.txt b/Documentation/devicetree/bindings/thermal/qcom-spmi-temp-alarm.txt index 290ec06fa33a..86fb41fe772f 100644 --- a/Documentation/devicetree/bindings/thermal/qcom-spmi-temp-alarm.txt +++ b/Documentation/devicetree/bindings/thermal/qcom-spmi-temp-alarm.txt @@ -6,8 +6,7 @@ interrupt signal and status register to identify high PMIC die temperature. Required properties: - compatible: Should contain "qcom,spmi-temp-alarm". -- reg: Specifies the SPMI address and length of the controller's - registers. +- reg: Specifies the SPMI address. - interrupts: PMIC temperature alarm interrupt. - #thermal-sensor-cells: Should be 0. See thermal.txt for a description. @@ -20,7 +19,7 @@ Example: pm8941_temp: thermal-alarm@2400 { compatible = "qcom,spmi-temp-alarm"; - reg = <0x2400 0x100>; + reg = <0x2400>; interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>; #thermal-sensor-cells = <0>; |