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authorJinqian Yang <yangjinqian1@huawei.com>2025-12-27 12:24:48 +0300
committerWill Deacon <will@kernel.org>2026-01-06 00:07:49 +0300
commite3baa5d4b361276efeb87b20d8beced451a7dbd5 (patch)
treebbc6d1abefbc0f1cbee095d902d473d4d31d9006
parent8f0b4cce4481fb22653697cced8d0d04027cb1e8 (diff)
downloadlinux-e3baa5d4b361276efeb87b20d8beced451a7dbd5.tar.xz
arm64: Add support for TSV110 Spectre-BHB mitigation
The TSV110 processor is vulnerable to the Spectre-BHB (Branch History Buffer) attack, which can be exploited to leak information through branch prediction side channels. This commit adds the MIDR of TSV110 to the list for software mitigation. Signed-off-by: Jinqian Yang <yangjinqian1@huawei.com> Reviewed-by: Zenghui Yu <zenghui.yu@linux.dev> Signed-off-by: Will Deacon <will@kernel.org>
-rw-r--r--arch/arm64/kernel/proton-pack.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/kernel/proton-pack.c b/arch/arm64/kernel/proton-pack.c
index 80a580e019c5..b3801f532b10 100644
--- a/arch/arm64/kernel/proton-pack.c
+++ b/arch/arm64/kernel/proton-pack.c
@@ -887,6 +887,7 @@ static u8 spectre_bhb_loop_affected(void)
MIDR_ALL_VERSIONS(MIDR_CORTEX_X2),
MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N2),
MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V1),
+ MIDR_ALL_VERSIONS(MIDR_HISI_TSV110),
{},
};
static const struct midr_range spectre_bhb_k24_list[] = {