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| author | Alex Deucher <alexander.deucher@amd.com> | 2025-10-10 22:52:51 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2025-12-11 01:38:15 +0300 |
| commit | e26e4225ae57faf7cd512df645b2c866fc2dce75 (patch) | |
| tree | b0a84970fa84a8af6ebf421aade9273a2e98457c | |
| parent | 90254524ee84ef812e6329a14dd76e9f53db5023 (diff) | |
| download | linux-e26e4225ae57faf7cd512df645b2c866fc2dce75.tar.xz | |
drm/amdgpu/gfx: add eop size and alignment to shadow info
This is used by firmware for compute user queues.
Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 4 |
3 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h index efd61a1ccc66..eebad3378352 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h @@ -328,6 +328,8 @@ struct amdgpu_gfx_shadow_info { u32 shadow_alignment; u32 csa_size; u32 csa_alignment; + u32 eop_size; + u32 eop_alignment; }; struct amdgpu_gfx_funcs { diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c index f4d4dd5dd07b..39284b5ddefd 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c @@ -1053,10 +1053,14 @@ static void gfx_v11_0_select_me_pipe_q(struct amdgpu_device *adev, static void gfx_v11_0_get_gfx_shadow_info_nocheck(struct amdgpu_device *adev, struct amdgpu_gfx_shadow_info *shadow_info) { + /* for gfx */ shadow_info->shadow_size = MQD_SHADOW_BASE_SIZE; shadow_info->shadow_alignment = MQD_SHADOW_BASE_ALIGNMENT; shadow_info->csa_size = MQD_FWWORKAREA_SIZE; shadow_info->csa_alignment = MQD_FWWORKAREA_ALIGNMENT; + /* for compute */ + shadow_info->eop_size = GFX11_MEC_HPD_SIZE; + shadow_info->eop_alignment = 256; } static int gfx_v11_0_get_gfx_shadow_info(struct amdgpu_device *adev, diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c index f9cae6666697..3db2eecd723d 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c @@ -910,10 +910,14 @@ static void gfx_v12_0_select_me_pipe_q(struct amdgpu_device *adev, static void gfx_v12_0_get_gfx_shadow_info_nocheck(struct amdgpu_device *adev, struct amdgpu_gfx_shadow_info *shadow_info) { + /* for gfx */ shadow_info->shadow_size = MQD_SHADOW_BASE_SIZE; shadow_info->shadow_alignment = MQD_SHADOW_BASE_ALIGNMENT; shadow_info->csa_size = MQD_FWWORKAREA_SIZE; shadow_info->csa_alignment = MQD_FWWORKAREA_ALIGNMENT; + /* for compute */ + shadow_info->eop_size = GFX12_MEC_HPD_SIZE; + shadow_info->eop_alignment = 256; } static int gfx_v12_0_get_gfx_shadow_info(struct amdgpu_device *adev, |
