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authorAlex Hung <alex.hung@amd.com>2026-02-18 19:50:15 +0300
committerAlex Deucher <alexander.deucher@amd.com>2026-03-03 00:39:18 +0300
commitd9bc24d263fdb420f61a8a8b8bbb1a68f5a0f803 (patch)
treeee3a9d71be53e39c9196c02a38da3b7d5f5d0d95
parent83b75278eb56ebc4cb73caf67572144293b739a9 (diff)
downloadlinux-d9bc24d263fdb420f61a8a8b8bbb1a68f5a0f803.tar.xz
drm/amd/display: Remove always-false branches
[WHAT] program_prealpha_dealpha and hpo_frl_stream_enc_acquired are always false and all branches depending on them will never be taken. This is reported as DEADCODE errors by Coverity. Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/display/dc/dpp/dcn42/dcn42_dpp.c5
-rw-r--r--drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c6
2 files changed, 1 insertions, 10 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn42/dcn42_dpp.c b/drivers/gpu/drm/amd/display/dc/dpp/dcn42/dcn42_dpp.c
index 244c91b762b0..c126fb9d5bfa 100644
--- a/drivers/gpu/drm/amd/display/dc/dpp/dcn42/dcn42_dpp.c
+++ b/drivers/gpu/drm/amd/display/dc/dpp/dcn42/dcn42_dpp.c
@@ -132,7 +132,6 @@ static void dpp42_dpp_setup(
uint32_t alpha_plane_enable = 0;
uint32_t dealpha_en = 0, dealpha_ablnd_en = 0;
uint32_t realpha_en = 0, realpha_ablnd_en = 0;
- uint32_t program_prealpha_dealpha = 0;
struct out_csc_color_matrix tbl_entry;
int i;
@@ -256,10 +255,6 @@ static void dpp42_dpp_setup(
CNVC_ALPHA_PLANE_ENABLE, alpha_plane_enable);
REG_UPDATE(FORMAT_CONTROL, FORMAT_CONTROL__ALPHA_EN, alpha_en);
- if (program_prealpha_dealpha) {
- dealpha_en = 1;
- realpha_en = 1;
- }
REG_SET_2(PRE_DEALPHA, 0,
PRE_DEALPHA_EN, dealpha_en,
PRE_DEALPHA_ABLND_EN, dealpha_ablnd_en);
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c
index 0d9871f9864b..f0e1ed0f2949 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c
@@ -1078,7 +1078,6 @@ void dcn42_optimize_bandwidth(struct dc *dc, struct dc_state *context)
void dcn42_calc_blocks_to_ungate(struct dc *dc, struct dc_state *context,
struct pg_block_update *update_state)
{
- bool hpo_frl_stream_enc_acquired = false;
bool hpo_dp_stream_enc_acquired = false;
int i = 0, j = 0;
@@ -1172,12 +1171,9 @@ void dcn42_calc_blocks_to_ungate(struct dc *dc, struct dc_state *context,
}
}
- if (hpo_frl_stream_enc_acquired || hpo_dp_stream_enc_acquired)
+ if (hpo_dp_stream_enc_acquired)
update_state->pg_res_update[PG_HPO] = true;
- if (hpo_frl_stream_enc_acquired)
- update_state->pg_pipe_res_update[PG_HDMISTREAM][0] = true;
-
if (count_active_streams(dc) > 0) {
update_state->pg_res_update[PG_DCCG] = true;
update_state->pg_res_update[PG_DCIO] = true;