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| author | Vladimir Zapolskiy <vz@mleia.com> | 2025-12-24 19:58:45 +0300 |
|---|---|---|
| committer | Vladimir Zapolskiy <vz@mleia.com> | 2026-01-09 10:15:49 +0300 |
| commit | d8bb9ef26e9c223c2113d08d89c2f912b22d518a (patch) | |
| tree | cedd7fc7e120be5a8ac2610fd67c17f4f40608c4 | |
| parent | 1594e575924c614bb376b4f0b749cef8e3fa4e29 (diff) | |
| download | linux-d8bb9ef26e9c223c2113d08d89c2f912b22d518a.tar.xz | |
ARM: dts: lpc32xx: describe FLASH_INT of SLC NAND controller
SLC and MLC NAND flash controllers fire the muxed interrupt FLASH_INT to
the SoC, add the interrupt property to the SLC device tree node.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
| -rw-r--r-- | arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi b/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi index 3d5a59b2886c..5ddaea8c481a 100644 --- a/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi +++ b/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi @@ -65,6 +65,7 @@ slc: nand-controller@20020000 { compatible = "nxp,lpc3220-slc"; reg = <0x20020000 0x1000>; + interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk LPC32XX_CLK_SLC>; status = "disabled"; }; |