diff options
| author | Stanley.Yang <Stanley.Yang@amd.com> | 2026-05-25 10:36:37 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2026-06-03 20:49:48 +0300 |
| commit | d7a5e069372f6a8af89dd6ee7b6fbe7ce5c99a67 (patch) | |
| tree | 282be4f7f9cd8a82e45d0641906a864102ef6f7e | |
| parent | d87c9d86727a0bcc95c3009a213a1b27a11b691e (diff) | |
| download | linux-d7a5e069372f6a8af89dd6ee7b6fbe7ce5c99a67.tar.xz | |
drm/amd/ras: Return RAS TA injection result to userspace
Return RAS TA injection result to userspace that avoid
app continue to load work once injection failed.
Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: YiPeng Chai <YiPeng.Chai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_cmd.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/ras/rascore/ras_psp.c | 21 |
2 files changed, 12 insertions, 11 deletions
diff --git a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_cmd.c b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_cmd.c index c22e53e84207..ff7f9af980d5 100644 --- a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_cmd.c +++ b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_cmd.c @@ -288,5 +288,5 @@ int amdgpu_ras_submit_cmd(struct ras_core_context *ras_core, struct ras_cmd_ctx return RAS_CMD__SUCCESS_EXEED_BUFFER; } - return RAS_CMD__SUCCESS; + return res; } diff --git a/drivers/gpu/drm/amd/ras/rascore/ras_psp.c b/drivers/gpu/drm/amd/ras/rascore/ras_psp.c index 5d556e2a7000..358f602b167d 100644 --- a/drivers/gpu/drm/amd/ras/rascore/ras_psp.c +++ b/drivers/gpu/drm/amd/ras/rascore/ras_psp.c @@ -317,36 +317,37 @@ exit: return ret; } -static void __check_ras_ta_cmd_resp(struct ras_core_context *ras_core, +static int __check_ras_ta_cmd_resp(struct ras_core_context *ras_core, struct ras_ta_cmd *ras_cmd) { - if (ras_cmd->ras_out_message.flags.err_inject_switch_disable_flag) { RAS_DEV_WARN(ras_core->dev, "ECC switch disabled\n"); ras_cmd->ras_status = RAS_TA_STATUS__ERROR_RAS_NOT_AVAILABLE; - } else if (ras_cmd->ras_out_message.flags.reg_access_failure_flag) + } else if (ras_cmd->ras_out_message.flags.reg_access_failure_flag) { RAS_DEV_WARN(ras_core->dev, "RAS internal register access blocked\n"); + ras_cmd->ras_status = RAS_TA_STATUS__TEE_ERROR_ACCESS_DENIED; + } switch (ras_cmd->ras_status) { + case RAS_TA_STATUS__SUCCESS: + return 0; case RAS_TA_STATUS__ERROR_UNSUPPORTED_IP: RAS_DEV_WARN(ras_core->dev, "RAS WARNING: cmd failed due to unsupported ip\n"); - break; + return -EINVAL; case RAS_TA_STATUS__ERROR_UNSUPPORTED_ERROR_INJ: RAS_DEV_WARN(ras_core->dev, "RAS WARNING: cmd failed due to unsupported error injection\n"); - break; - case RAS_TA_STATUS__SUCCESS: - break; + return -EINVAL; case RAS_TA_STATUS__TEE_ERROR_ACCESS_DENIED: if (ras_cmd->cmd_id == RAS_TA_CMD_ID__TRIGGER_ERROR) RAS_DEV_WARN(ras_core->dev, "RAS WARNING: Inject error to critical region is not allowed\n"); - break; + return -EACCES; default: RAS_DEV_WARN(ras_core->dev, "RAS WARNING: ras status = 0x%X\n", ras_cmd->ras_status); - break; + return -EINVAL; } } @@ -417,7 +418,7 @@ static int send_ras_ta_runtime_cmd(struct ras_core_context *ras_core, if (!ras_cmd->ras_status && out && out_size) memcpy(out, &ras_cmd->ras_out_message, out_size); - __check_ras_ta_cmd_resp(ras_core, ras_cmd); + ret = __check_ras_ta_cmd_resp(ras_core, ras_cmd); unlock: mutex_unlock(&ta_ctx->ta_mutex); |