diff options
| author | Biju Das <biju.das.jz@bp.renesas.com> | 2026-03-25 22:24:22 +0300 |
|---|---|---|
| committer | Thomas Gleixner <tglx@kernel.org> | 2026-03-26 18:56:21 +0300 |
| commit | d196aeb35efa2f2339b31f107c0ce35387946009 (patch) | |
| tree | e51d6a4105890f4339470238ed8ba0d0484da159 | |
| parent | 6e5e0331dea48bbd6955af562aab4972a3950fa2 (diff) | |
| download | linux-d196aeb35efa2f2339b31f107c0ce35387946009.tar.xz | |
irqchip/renesas-rzg2l: Split set_type handler into separate IRQ and TINT functions
The common rzg2l_irqc_set_type() handler uses hw_irq range checks to
dispatch to either rzg2l_irq_set_type() or rzg2l_tint_set_edge().
Split this into two dedicated handlers, rzg2l_irqc_irq_set_type() and
rzg2l_irqc_tint_set_type(), each calling only their respective type
configuration function without runtime conditionals.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Link: https://patch.msgid.link/20260325192451.172562-8-biju.das.jz@bp.renesas.com
| -rw-r--r-- | drivers/irqchip/irq-renesas-rzg2l.c | 27 |
1 files changed, 16 insertions, 11 deletions
diff --git a/drivers/irqchip/irq-renesas-rzg2l.c b/drivers/irqchip/irq-renesas-rzg2l.c index 664599acbeb6..3d48491c2f06 100644 --- a/drivers/irqchip/irq-renesas-rzg2l.c +++ b/drivers/irqchip/irq-renesas-rzg2l.c @@ -393,15 +393,20 @@ static int rzg2l_tint_set_edge(struct irq_data *d, unsigned int type) return 0; } -static int rzg2l_irqc_set_type(struct irq_data *d, unsigned int type) +static int rzg2l_irqc_irq_set_type(struct irq_data *d, unsigned int type) { - unsigned int hw_irq = irqd_to_hwirq(d); - int ret = -EINVAL; + int ret = rzg2l_irq_set_type(d, type); + + if (ret) + return ret; + + return irq_chip_set_type_parent(d, IRQ_TYPE_LEVEL_HIGH); +} + +static int rzg2l_irqc_tint_set_type(struct irq_data *d, unsigned int type) +{ + int ret = rzg2l_tint_set_edge(d, type); - if (hw_irq >= IRQC_IRQ_START && hw_irq <= IRQC_IRQ_COUNT) - ret = rzg2l_irq_set_type(d, type); - else if (hw_irq >= IRQC_TINT_START && hw_irq < IRQC_NUM_IRQ) - ret = rzg2l_tint_set_edge(d, type); if (ret) return ret; @@ -454,7 +459,7 @@ static const struct irq_chip rzg2l_irqc_irq_chip = { .irq_get_irqchip_state = irq_chip_get_parent_state, .irq_set_irqchip_state = irq_chip_set_parent_state, .irq_retrigger = irq_chip_retrigger_hierarchy, - .irq_set_type = rzg2l_irqc_set_type, + .irq_set_type = rzg2l_irqc_irq_set_type, .irq_set_affinity = irq_chip_set_affinity_parent, .flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SET_TYPE_MASKED | @@ -471,7 +476,7 @@ static const struct irq_chip rzg2l_irqc_tint_chip = { .irq_get_irqchip_state = irq_chip_get_parent_state, .irq_set_irqchip_state = irq_chip_set_parent_state, .irq_retrigger = irq_chip_retrigger_hierarchy, - .irq_set_type = rzg2l_irqc_set_type, + .irq_set_type = rzg2l_irqc_tint_set_type, .irq_set_affinity = irq_chip_set_affinity_parent, .flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SET_TYPE_MASKED | @@ -488,7 +493,7 @@ static const struct irq_chip rzfive_irqc_irq_chip = { .irq_get_irqchip_state = irq_chip_get_parent_state, .irq_set_irqchip_state = irq_chip_set_parent_state, .irq_retrigger = irq_chip_retrigger_hierarchy, - .irq_set_type = rzg2l_irqc_set_type, + .irq_set_type = rzg2l_irqc_irq_set_type, .irq_set_affinity = irq_chip_set_affinity_parent, .flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SET_TYPE_MASKED | @@ -505,7 +510,7 @@ static const struct irq_chip rzfive_irqc_tint_chip = { .irq_get_irqchip_state = irq_chip_get_parent_state, .irq_set_irqchip_state = irq_chip_set_parent_state, .irq_retrigger = irq_chip_retrigger_hierarchy, - .irq_set_type = rzg2l_irqc_set_type, + .irq_set_type = rzg2l_irqc_tint_set_type, .irq_set_affinity = irq_chip_set_affinity_parent, .flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SET_TYPE_MASKED | |