diff options
| author | Danylo Piliaiev <dpiliaiev@igalia.com> | 2023-11-25 22:11:50 +0300 |
|---|---|---|
| committer | Rob Clark <robdclark@chromium.org> | 2023-11-25 22:16:04 +0300 |
| commit | cf1aaa7d4a719f0bdd9c246c0fac8247cb54ddd7 (patch) | |
| tree | 7d89826c879a46130e8612bcee80d54d3c3baf0b | |
| parent | 6c15808d9b7640c3209d53cd2d8d56cfbf9f7175 (diff) | |
| download | linux-cf1aaa7d4a719f0bdd9c246c0fac8247cb54ddd7.tar.xz | |
drm/msm/a6xx: Add missing BIT(7) to REG_A6XX_UCHE_CLIENT_PF
Downstream always set BIT(7)
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Patchwork: https://patchwork.freedesktop.org/patch/568930/
| -rw-r--r-- | drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index 7a0220d29a23..e5558d5e0aa2 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -1782,7 +1782,7 @@ static int hw_init(struct msm_gpu *gpu) else gpu_write(gpu, REG_A6XX_RBBM_INTERFACE_HANG_INT_CNTL, (1 << 30) | 0x1fffff); - gpu_write(gpu, REG_A6XX_UCHE_CLIENT_PF, 1); + gpu_write(gpu, REG_A6XX_UCHE_CLIENT_PF, BIT(7) | 0x1); /* Set weights for bicubic filtering */ if (adreno_is_a650_family(adreno_gpu)) { |