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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2016-04-04 17:35:13 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2016-04-30 19:26:55 +0300
commitceeafb8e222f4ea73981ca0bf9f29882cb0c34b2 (patch)
tree364596c836b754840fe25dc17d9fc864f4912a10
parent1fc969c759861ac491b6c93116aa497f774b00dc (diff)
downloadlinux-ceeafb8e222f4ea73981ca0bf9f29882cb0c34b2.tar.xz
serial: 8250_mid: correct comment regarding Tangier HSU
On Intel Penwell and Tangier the HSU block (3 HSU ports) has a global register set which is currently not used by the driver. On Tangier it has it's own PCI device and thus available for enumeration. Since it's not a real HSU port we just skip it and therefore put a comment in the code why we do so. Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/tty/serial/8250/8250_mid.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/tty/serial/8250/8250_mid.c b/drivers/tty/serial/8250/8250_mid.c
index e8122375aa18..86379a79a6a3 100644
--- a/drivers/tty/serial/8250/8250_mid.c
+++ b/drivers/tty/serial/8250/8250_mid.c
@@ -80,7 +80,11 @@ static int tng_setup(struct mid8250 *mid, struct uart_port *p)
struct pci_dev *pdev = to_pci_dev(p->dev);
int index = PCI_FUNC(pdev->devfn);
- /* Currently no support for HSU port0 */
+ /*
+ * Device 0000:00:04.0 is not a real HSU port. It provides a global
+ * register set for all HSU ports, although it has the same PCI ID.
+ * Skip it here.
+ */
if (index-- == 0)
return -ENODEV;