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| author | Paul Burton <paul.burton@imgtec.com> | 2017-06-02 21:35:01 +0300 |
|---|---|---|
| committer | Sasha Levin <alexander.levin@verizon.com> | 2017-06-26 05:02:22 +0300 |
| commit | cedbfb3dc38c128f7541a5e6050862ee038e7583 (patch) | |
| tree | cb4174d751a5f00cb097b1cfab692adbb065f86e | |
| parent | d490b0caf87fa4d743b6cc2c00a16aa1f84d2c74 (diff) | |
| download | linux-cedbfb3dc38c128f7541a5e6050862ee038e7583.tar.xz | |
MIPS: Fix bnezc/jialc return address calculation
[ Upstream commit 1a73d9310e093fc3adffba4d0a67b9fab2ee3f63 ]
The code handling the pop76 opcode (ie. bnezc & jialc instructions) in
__compute_return_epc_for_insn() needs to set the value of $31 in the
jialc case, which is encoded with rs = 0. However its check to
differentiate bnezc (rs != 0) from jialc (rs = 0) was unfortunately
backwards, meaning that if we emulate a bnezc instruction we clobber $31
& if we emulate a jialc instruction it actually behaves like a jic
instruction.
Fix this by inverting the check of rs to match the way the instructions
are actually encoded.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Fixes: 28d6f93d201d ("MIPS: Emulate the new MIPS R6 BNEZC and JIALC instructions")
Cc: stable <stable@vger.kernel.org> # v4.0+
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16178/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
| -rw-r--r-- | arch/mips/kernel/branch.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c index c0c5e5972256..fe376aa705c5 100644 --- a/arch/mips/kernel/branch.c +++ b/arch/mips/kernel/branch.c @@ -816,8 +816,10 @@ int __compute_return_epc_for_insn(struct pt_regs *regs, break; } /* Compact branch: BNEZC || JIALC */ - if (insn.i_format.rs) + if (!insn.i_format.rs) { + /* JIALC: set $31/ra */ regs->regs[31] = epc + 4; + } regs->cp0_epc += 8; break; #endif |