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authorClément Léger <cleger@rivosinc.com>2023-12-20 18:57:19 +0300
committerPalmer Dabbelt <palmer@rivosinc.com>2024-01-10 07:12:27 +0300
commitcd7be4d02f418d5d62bcaf26e5c44ceb4ce00029 (patch)
tree1bbceee9dcd5f0987e70288aa2fe9c24577b887d
parent5b4d64a819c05e7e96e7ab3f00f4f0967246905f (diff)
downloadlinux-cd7be4d02f418d5d62bcaf26e5c44ceb4ce00029.tar.xz
dt-bindings: riscv: add Zacas ISA extension description
Add description for the Zacas ISA extension which was ratified recently. Signed-off-by: Clément Léger <cleger@rivosinc.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20231220155723.684081-4-cleger@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
-rw-r--r--Documentation/devicetree/bindings/riscv/extensions.yaml6
1 files changed, 6 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
index 3574a0b70be4..27beedb98198 100644
--- a/Documentation/devicetree/bindings/riscv/extensions.yaml
+++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
@@ -171,6 +171,12 @@ properties:
memory types as ratified in the 20191213 version of the privileged
ISA specification.
+ - const: zacas
+ description: |
+ The Zacas extension for Atomic Compare-and-Swap (CAS) instructions
+ is supported as ratified at commit 5059e0ca641c ("update to
+ ratified") of the riscv-zacas.
+
- const: zba
description: |
The standard Zba bit-manipulation extension for address generation