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| author | Bjorn Andersson <andersson@kernel.org> | 2025-08-12 17:58:37 +0300 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2025-08-12 17:58:37 +0300 |
| commit | ccdba33f5c32bca06f5186eedeb15944f84db996 (patch) | |
| tree | 9176bc3840820c0786cf343a603cb956aefd2410 | |
| parent | be477c3924f80809871df12f72d80d405d482ba2 (diff) | |
| parent | 039a504cda2cb69354387aa453391ec89a9e0e49 (diff) | |
| download | linux-ccdba33f5c32bca06f5186eedeb15944f84db996.tar.xz | |
Merge branch '20250811-sc7280-mdss-reset-v1-1-83ceff1d48de@oss.qualcomm.com' into clk-for-6.18
Merge the addition of reset constants to the SC7280 display clock
controller binding through a topic branch to allow it to be included in
the DeviceTree branch as well.
| -rw-r--r-- | include/dt-bindings/clock/qcom,dispcc-sc7280.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/qcom,dispcc-sc7280.h b/include/dt-bindings/clock/qcom,dispcc-sc7280.h index a4a692c20acf..9f113f346be8 100644 --- a/include/dt-bindings/clock/qcom,dispcc-sc7280.h +++ b/include/dt-bindings/clock/qcom,dispcc-sc7280.h @@ -52,4 +52,8 @@ /* DISP_CC power domains */ #define DISP_CC_MDSS_CORE_GDSC 0 +/* DISPCC resets */ +#define DISP_CC_MDSS_CORE_BCR 0 +#define DISP_CC_MDSS_RSCC_BCR 1 + #endif |