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| author | Bitterblue Smith <rtl8821cerfe2@gmail.com> | 2026-05-16 15:32:12 +0300 |
|---|---|---|
| committer | Ping-Ke Shih <pkshih@realtek.com> | 2026-05-25 09:27:32 +0300 |
| commit | cc9cdac8009979e5b77a9d05841ab2d9ca03e68e (patch) | |
| tree | 1167b872ac78cea3082368560ceab61f59ab05fa | |
| parent | 9d69ffa4f8da8257e247a4b7163e0aae4b624d7e (diff) | |
| download | linux-cc9cdac8009979e5b77a9d05841ab2d9ca03e68e.tar.xz | |
wifi: rtw89: Add missing TX queue mappings for RTL8922AU
A user with MLO-capable router reports:
[ 753.080409] rtw89_8922au_git 2-2:1.0: Cannot map qsel to dma v2: 26
[ 753.080417] rtw89_8922au_git 2-2:1.0: Cannot map qsel to dma v2: 26
[ 813.649426] rtw89_8922au_git 2-2:1.0: Cannot map qsel to dma v2: 26
[ 813.649445] rtw89_8922au_git 2-2:1.0: Cannot map qsel to dma v2: 26
[ 813.855983] rtw89_8922au_git 2-2:1.0: Cannot map qsel to dma v2: 26
Map RTW89_TX_QSEL_B1_MGMT and RTW89_TX_QSEL_B1_HI to RTW89_TXCH_CH10.
This is probably the right channel for these queues.
This function is also used for RTL8852AU and RTL8852CU, but those
currently aren't used in DBCC mode with rtw89 so it makes no difference
for them.
Link: https://github.com/morrownr/rtw89/issues/83#issuecomment-4314735734
Signed-off-by: Bitterblue Smith <rtl8821cerfe2@gmail.com>
Acked-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/0c8e0cf1-13e9-4c67-a67f-5f6f79fd0658@gmail.com
| -rw-r--r-- | drivers/net/wireless/realtek/rtw89/core.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/net/wireless/realtek/rtw89/core.c b/drivers/net/wireless/realtek/rtw89/core.c index 0f3168d85369..c1df3e2ba11e 100644 --- a/drivers/net/wireless/realtek/rtw89/core.c +++ b/drivers/net/wireless/realtek/rtw89/core.c @@ -854,6 +854,9 @@ u8 rtw89_core_get_ch_dma_v2(struct rtw89_dev *rtwdev, u8 qsel) case RTW89_TX_QSEL_B0_MGMT: case RTW89_TX_QSEL_B0_HI: return RTW89_TXCH_CH8; + case RTW89_TX_QSEL_B1_MGMT: + case RTW89_TX_QSEL_B1_HI: + return RTW89_TXCH_CH10; } } EXPORT_SYMBOL(rtw89_core_get_ch_dma_v2); |