diff options
| author | Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com> | 2026-03-11 11:11:54 +0300 |
|---|---|---|
| committer | Frank Li <Frank.Li@nxp.com> | 2026-03-27 16:52:19 +0300 |
| commit | cb7b1131885b6a1ee2a60969d433d66069151bb5 (patch) | |
| tree | 29cd58faa425bb29ba338fdeabeef6f9d763f655 | |
| parent | b6219083012756cd77966caf1c2b408178ee5a79 (diff) | |
| download | linux-cb7b1131885b6a1ee2a60969d433d66069151bb5.tar.xz | |
arm64: dts: freescale: Add NXP S32N79-RDB board support
Add device tree support for the NXP S32N79 Reference Design Board
(RDB) [1].
The S32N79-RDB enables the following peripherals:
- PL011 UART controllers (uart0, uart5, uart6, uart7)
- uSDHC controller
- IRQ steering controller
The board has 32GB of DRAM memory with 28GB usable and 4GB reserved
for ECC logic.
[1] https://www.nxp.com/products/processors-and-microcontrollers/s32-automotive-platform/s32n-vehicle-super-integration-processors:S32N
Co-developed-by: Larisa Grigore <larisa.grigore@nxp.com>
Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com>
Co-developed-by: Andra-Teodora Ilie <andra.ilie@nxp.com>
Signed-off-by: Andra-Teodora Ilie <andra.ilie@nxp.com>
Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/freescale/s32n79-rdb.dts | 70 |
2 files changed, 71 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index a6fe56bb93aa..bae24b53bce6 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -519,4 +519,5 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-phygate-tauri-l-rs232-rs485.dtb dtb-$(CONFIG_ARCH_S32) += s32g274a-evb.dtb dtb-$(CONFIG_ARCH_S32) += s32g274a-rdb2.dtb dtb-$(CONFIG_ARCH_S32) += s32g399a-rdb3.dtb +dtb-$(CONFIG_ARCH_S32) += s32n79-rdb.dtb dtb-$(CONFIG_ARCH_S32) += s32v234-evb.dtb diff --git a/arch/arm64/boot/dts/freescale/s32n79-rdb.dts b/arch/arm64/boot/dts/freescale/s32n79-rdb.dts new file mode 100644 index 000000000000..1feccd61258e --- /dev/null +++ b/arch/arm64/boot/dts/freescale/s32n79-rdb.dts @@ -0,0 +1,70 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2026 NXP + * + * NXP S32N79 Reference Design Board (S32N79-RDB) + */ + +/dts-v1/; +#include "s32n79.dtsi" + +/ { + compatible = "nxp,s32n79-rdb", "nxp,s32n79"; + model = "NXP S32N79-RDB"; + + aliases { + serial0 = &uart0; + serial1 = &uart5; + serial2 = &uart6; + serial3 = &uart7; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reserved-memory { + ranges; + #address-cells = <2>; + #size-cells = <2>; + + scmi_shbuf: memory@93000000 { + compatible = "arm,scmi-shmem"; + reg = <0x0 0x93000000 0x0 0x80>; + no-map; + }; + }; + + memory@80000000 { + reg = <0x00 0x80000000 0x00 0x80000000>, + <0x88 0x00000000 0x03 0x40000000>, + <0xc0 0x00000000 0x03 0x40000000>; + device_type = "memory"; + }; +}; + +&irqsteer_coss { + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; + +&uart5 { + status = "okay"; +}; + +&uart6 { + status = "okay"; +}; + +&uart7 { + status = "okay"; +}; + +&usdhc0 { + disable-wp; + no-sdio; + status = "okay"; +}; |