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authorRichard Zhu <hongxing.zhu@nxp.com>2025-10-24 10:31:47 +0300
committerShawn Guo <shawnguo@kernel.org>2025-11-12 04:57:41 +0300
commitcaf08e2d494ec9790abe4f65130327c38eeb9d83 (patch)
treedcf3d03716d4f028e6113a7d25ba366929edce9c
parent55a79e599aa8fef6b2b268fb9357722d080b9730 (diff)
downloadlinux-caf08e2d494ec9790abe4f65130327c38eeb9d83.tar.xz
arm64: dts: imx8mp-evk: Add vpcie3v3aux regulator for PCIe M.2 connector
Refer to PCI Express M.2 Specification r5.1 sec3.1.1 Power Sources and Grounds. PCI Express M.2 Socket 1 utilizes a 3.3 V power source. The voltage source, 3.3 V, is expected to be available during the system’s stand-by/suspend state to support wake event processing on the communications card. Add vpcie3v3aux regulator to let this 3.3 V power source always on for PCIe M.2 Key E connector on i.MX8MP EVK board. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-rw-r--r--arch/arm64/boot/dts/freescale/imx8mp-evk.dts1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
index 523bf4aeff31..f0762ba60c8c 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
@@ -710,6 +710,7 @@
pinctrl-0 = <&pinctrl_pcie0>;
reset-gpio = <&gpio2 7 GPIO_ACTIVE_LOW>;
vpcie-supply = <&reg_pcie0>;
+ vpcie3v3aux-supply = <&reg_pcie0>;
supports-clkreq;
status = "okay";
};