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author | Sven Schnelle <svens@linux.ibm.com> | 2024-07-22 16:41:17 +0300 |
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committer | Vasily Gorbik <gor@linux.ibm.com> | 2024-07-23 17:02:32 +0300 |
commit | ca2f0a26c498c42fcccdf09527e8755481801eea (patch) | |
tree | c3d8d983494e82824fdec8967c3d5e80dbf88c41 | |
parent | 12184a46767b40c1c9b022cd96a9b4019ebd368f (diff) | |
download | linux-ca2f0a26c498c42fcccdf09527e8755481801eea.tar.xz |
s390/entry: Add base register to MBEAR macro
In preparation of having lowcore at different address than zero,
add the base register to MBEAR. No functional change, because
%r0 is passed to the macro.
Reviewed-by: Heiko Carstens <hca@linux.ibm.com>
Signed-off-by: Sven Schnelle <svens@linux.ibm.com>
Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
-rw-r--r-- | arch/s390/kernel/entry.S | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S index 618b8b774932..0d624045f2a6 100644 --- a/arch/s390/kernel/entry.S +++ b/arch/s390/kernel/entry.S @@ -44,8 +44,9 @@ _LPP_OFFSET = __LC_LPP ALTERNATIVE "b \lpswe; nopr", ".insn siy,0xeb0000000071,\address,0", ALT_FACILITY(193) .endm - .macro MBEAR reg - ALTERNATIVE "brcl 0,0", __stringify(mvc __PT_LAST_BREAK(8,\reg),__LC_LAST_BREAK), ALT_FACILITY(193) + .macro MBEAR reg, lowcore + ALTERNATIVE "brcl 0,0", __stringify(mvc __PT_LAST_BREAK(8,\reg),__LC_LAST_BREAK(\lowcore)),\ + ALT_FACILITY(193) .endm .macro CHECK_STACK savearea @@ -282,7 +283,7 @@ SYM_CODE_START(system_call) xgr %r11,%r11 la %r2,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs mvc __PT_R8(64,%r2),__LC_SAVE_AREA_SYNC - MBEAR %r2 + MBEAR %r2,%r0 lgr %r3,%r14 brasl %r14,__do_syscall STACKLEAK_ERASE @@ -424,7 +425,7 @@ SYM_CODE_START(\name) xgr %r10,%r10 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC - MBEAR %r11 + MBEAR %r11,%r0 stmg %r8,%r9,__PT_PSW(%r11) lgr %r2,%r11 # pass pointer to pt_regs brasl %r14,\handler |