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| author | Arnd Bergmann <arnd@arndb.de> | 2026-06-12 10:01:25 +0300 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2026-06-12 10:01:32 +0300 |
| commit | c936d730575fcbf6203bf0f10d37409b33725647 (patch) | |
| tree | 9febac74afc8bb0b689dcd668ef6c41a8aea9e05 | |
| parent | 564edaca14861ba9e58d4e646d272c677296d285 (diff) | |
| parent | 6191a61ec9d9d8f1d1d1d6bfcb6d303be76c2804 (diff) | |
| download | linux-c936d730575fcbf6203bf0f10d37409b33725647.tar.xz | |
Merge tag 'bst-arm64-emmc-driver-dts-for-v7.2' of https://github.com/BlackSesame-SoC/linux into soc/dt
arm64: BST C1200 eMMC DTS for v7.2
Black Sesame Technologies:
Enable eMMC controller on BST C1200 CDCU1.0 board:
- Add mmc0 node in bstc1200.dtsi (DWCMSHC SDHCI controller)
- Add fixed clock definition and reserved SRAM bounce buffer
- Enable mmc0 with 8-bit bus on CDCU1.0 ADAS 4C2G board
The MMC driver was merged via mmc-next in v7.1-rc1.
this is the remaining DTS piece.
Signed-off-by: Gordon Ge <gordon.ge@bst.ai>
* tag 'bst-arm64-emmc-driver-dts-for-v7.2' of https://github.com/BlackSesame-SoC/linux:
arm64: dts: bst: enable eMMC controller in C1200
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| -rw-r--r-- | arch/arm64/boot/dts/bst/bstc1200-cdcu1.0-adas_4c2g.dts | 19 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/bst/bstc1200.dtsi | 18 |
2 files changed, 37 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/bst/bstc1200-cdcu1.0-adas_4c2g.dts b/arch/arm64/boot/dts/bst/bstc1200-cdcu1.0-adas_4c2g.dts index 5eb9ef369d8c..178ad4bf4f0a 100644 --- a/arch/arm64/boot/dts/bst/bstc1200-cdcu1.0-adas_4c2g.dts +++ b/arch/arm64/boot/dts/bst/bstc1200-cdcu1.0-adas_4c2g.dts @@ -17,6 +17,25 @@ <0x8 0xc0000000 0x1 0x0>, <0xc 0x00000000 0x0 0x40000000>; }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + mmc0_reserved: mmc0-reserved@5160000 { + compatible = "shared-dma-pool"; + reg = <0x0 0x5160000 0x0 0x10000>; + no-map; + }; + }; +}; + +&mmc0 { + bus-width = <8>; + memory-region = <&mmc0_reserved>; + non-removable; + status = "okay"; }; &uart0 { diff --git a/arch/arm64/boot/dts/bst/bstc1200.dtsi b/arch/arm64/boot/dts/bst/bstc1200.dtsi index dd13c6bfc3c8..9660d8396e27 100644 --- a/arch/arm64/boot/dts/bst/bstc1200.dtsi +++ b/arch/arm64/boot/dts/bst/bstc1200.dtsi @@ -7,6 +7,12 @@ #address-cells = <2>; #size-cells = <2>; + clk_mmc: clock-4000000 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <4000000>; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -72,6 +78,18 @@ status = "disabled"; }; + mmc0: mmc@22200000 { + compatible = "bst,c1200-sdhci"; + reg = <0x0 0x22200000 0x0 0x1000>, + <0x0 0x23006000 0x0 0x1000>; + clocks = <&clk_mmc>; + clock-names = "core"; + dma-coherent; + interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; + max-frequency = <200000000>; + status = "disabled"; + }; + gic: interrupt-controller@32800000 { compatible = "arm,gic-v3"; reg = <0x0 0x32800000 0x0 0x10000>, |