summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorImre Deak <imre.deak@intel.com>2025-02-14 17:19:56 +0300
committerImre Deak <imre.deak@intel.com>2025-02-14 22:39:07 +0300
commitc729ff4598d023afb8f81de63e1363d4c2a7cd40 (patch)
tree86953031a4f369fb2f35c47f4eb211ae0f991af8
parentd6e6cb5980ed8ad09cdcf3669056564b29b07585 (diff)
downloadlinux-c729ff4598d023afb8f81de63e1363d4c2a7cd40.tar.xz
drm/i915/ddi: Simplify the port disabling via DDI_BUF_CTL
A port can be disabled only via a modeset (or during HW state sanitization) when the port is enabled. Thus it's not required to check the port's enabled state before disabling it. In any case if the port happened to be disabled, the following disabling would be just a nop and waiting for the buffer's idle state should succeed. Simplify the disabling sequence accordingly. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250214142001.552916-7-imre.deak@intel.com
-rw-r--r--drivers/gpu/drm/i915/display/intel_ddi.c23
1 files changed, 5 insertions, 18 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 5d008c04ca2d..25be10e08b16 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3077,17 +3077,12 @@ static void mtl_disable_ddi_buf(struct intel_encoder *encoder,
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
enum port port = encoder->port;
- u32 val;
/* 3.b Clear DDI_CTL_DE Enable to 0. */
- val = intel_de_read(dev_priv, DDI_BUF_CTL(port));
- if (val & DDI_BUF_CTL_ENABLE) {
- val &= ~DDI_BUF_CTL_ENABLE;
- intel_de_write(dev_priv, DDI_BUF_CTL(port), val);
+ intel_de_rmw(dev_priv, DDI_BUF_CTL(port), DDI_BUF_CTL_ENABLE, 0);
- /* 3.c Poll for PORT_BUF_CTL Idle Status == 1, timeout after 100us */
- mtl_wait_ddi_buf_idle(dev_priv, port);
- }
+ /* 3.c Poll for PORT_BUF_CTL Idle Status == 1, timeout after 100us */
+ mtl_wait_ddi_buf_idle(dev_priv, port);
/* 3.d Disable D2D Link */
mtl_ddi_disable_d2d_link(encoder);
@@ -3104,15 +3099,8 @@ static void disable_ddi_buf(struct intel_encoder *encoder,
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
enum port port = encoder->port;
- bool wait = false;
- u32 val;
- val = intel_de_read(dev_priv, DDI_BUF_CTL(port));
- if (val & DDI_BUF_CTL_ENABLE) {
- val &= ~DDI_BUF_CTL_ENABLE;
- intel_de_write(dev_priv, DDI_BUF_CTL(port), val);
- wait = true;
- }
+ intel_de_rmw(dev_priv, DDI_BUF_CTL(port), DDI_BUF_CTL_ENABLE, 0);
if (intel_crtc_has_dp_encoder(crtc_state))
intel_de_rmw(dev_priv, dp_tp_ctl_reg(encoder, crtc_state),
@@ -3120,8 +3108,7 @@ static void disable_ddi_buf(struct intel_encoder *encoder,
intel_ddi_disable_fec(encoder, crtc_state);
- if (wait)
- intel_wait_ddi_buf_idle(dev_priv, port);
+ intel_wait_ddi_buf_idle(dev_priv, port);
}
static void intel_disable_ddi_buf(struct intel_encoder *encoder,