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authorMarek Vasut <marek.vasut+renesas@mailbox.org>2026-01-18 16:49:54 +0300
committerGeert Uytterhoeven <geert+renesas@glider.be>2026-03-06 15:18:46 +0300
commitc6ffd326277aa87138ee6ed4fc4e6f8af1106179 (patch)
treed099f1ed403668e13b9d787a222f67a03a1d9ac3
parent1ec13760f46831108833221e2812f15d03ac71e5 (diff)
downloadlinux-c6ffd326277aa87138ee6ed4fc4e6f8af1106179.tar.xz
arm64: dts: renesas: r8a77990: Add USB 3.0 PHY and USB3S0 clock nodes
Add USB 3.0 PHY and PHY clock node for R-Car E3. The PHY node is different in that it does not have control registers and extal clock, which are not routed to the SoC pads on R-Car E3, therefore describe the PHY as usb-nop-xceiv simple PHY. Add USB3S0 clock pad fixed-clock node, the frequency has to be overridden at board level. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260118135038.8033-7-marek.vasut+renesas@mailbox.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-rw-r--r--arch/arm64/boot/dts/renesas/r8a77990.dtsi17
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
index 39824ba6e6d5..fadb5f4effcf 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
@@ -2190,4 +2190,21 @@
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
interrupt-names = "sec-phys", "phys", "virt", "hyp-phys";
};
+
+ /* External USB clock - to be overridden by boards that provide it */
+ usb3s0_clk: usb3s0-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ usb3_phy0: usb-phy {
+ compatible = "usb-nop-xceiv";
+ clocks = <&usb3s0_clk>;
+ clock-names = "main_clk";
+ clock-frequency = <100000000>;
+ power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
};