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| author | Dinh Nguyen <dinguyen@opensource.altera.com> | 2014-08-14 19:37:22 +0400 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@opensource.altera.com> | 2014-09-04 19:15:51 +0400 |
| commit | c6dcb1010239e484a461178d3318b35ef44dbcf0 (patch) | |
| tree | 02275df9c2bd3d06431791656d963c5c53f89ed6 | |
| parent | 8126def857fdc5aba60a72a3a883f5eccf7c91d7 (diff) | |
| download | linux-c6dcb1010239e484a461178d3318b35ef44dbcf0.tar.xz | |
ARM: dts: socfpga: memreserve first 4KB for future system use
This patch adds a /memreserve/ section to reserve the first 4K for future
use by the system. One possible use-case is trampoline code used to bring
secondary cores online.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
---
v3: Update commit message based on Mark Rutland's comment
v2: Add a comment in the dts files
| -rw-r--r-- | arch/arm/boot/dts/socfpga_arria5.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/socfpga_cyclone5.dtsi | 2 |
2 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi b/arch/arm/boot/dts/socfpga_arria5.dtsi index 468fc4cf0742..03e8268ae219 100644 --- a/arch/arm/boot/dts/socfpga_arria5.dtsi +++ b/arch/arm/boot/dts/socfpga_arria5.dtsi @@ -15,6 +15,8 @@ */ /dts-v1/; +/* First 4KB has trampoline code for secondary cores. */ +/memreserve/ 0x00000000 0x0001000; #include "socfpga.dtsi" / { diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dtsi b/arch/arm/boot/dts/socfpga_cyclone5.dtsi index 33cad8bcba18..28c05e7a31c9 100644 --- a/arch/arm/boot/dts/socfpga_cyclone5.dtsi +++ b/arch/arm/boot/dts/socfpga_cyclone5.dtsi @@ -16,6 +16,8 @@ */ /dts-v1/; +/* First 4KB has trampoline code for secondary cores. */ +/memreserve/ 0x00000000 0x0001000; #include "socfpga.dtsi" / { |