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| author | Yuanjie Yang <yuanjie.yang@oss.qualcomm.com> | 2026-01-15 12:27:48 +0300 |
|---|---|---|
| committer | Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> | 2026-01-21 03:07:23 +0300 |
| commit | c6c9f129e98ee86f960f42a6f14fa84c82069481 (patch) | |
| tree | 2bf61e8818d381e9a8f5db9e406e00e798a62b15 | |
| parent | 688c7734002a1ee6f50a28ba9bd7aa380edbe12d (diff) | |
| download | linux-c6c9f129e98ee86f960f42a6f14fa84c82069481.tar.xz | |
drm/msm/dpu: Add Kaanapali WB support
Add support for Kaanapali WB, which introduce register
relocations, use the updated registeri definition to ensure
compatibility.
Co-developed-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com>
Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Yuanjie Yang <yuanjie.yang@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/698715/
Link: https://lore.kernel.org/r/20260115092749.533-12-yuanjie.yang@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
| -rw-r--r-- | drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c index 478a091aeccf..4da4bd6a997c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c @@ -148,6 +148,15 @@ static void dpu_hw_wb_setup_qos_lut(struct dpu_hw_wb *ctx, cfg); } +static void dpu_hw_wb_setup_qos_lut_v13(struct dpu_hw_wb *ctx, + struct dpu_hw_qos_cfg *cfg) +{ + if (!ctx || !cfg) + return; + + dpu_hw_setup_qos_lut_v13(&ctx->hw, cfg); +} + static void dpu_hw_wb_setup_cdp(struct dpu_hw_wb *ctx, const struct msm_format *fmt, bool enable) @@ -202,8 +211,12 @@ static void _setup_wb_ops(struct dpu_hw_wb_ops *ops, if (test_bit(DPU_WB_XY_ROI_OFFSET, &features)) ops->setup_roi = dpu_hw_wb_roi; - if (test_bit(DPU_WB_QOS, &features)) - ops->setup_qos_lut = dpu_hw_wb_setup_qos_lut; + if (test_bit(DPU_WB_QOS, &features)) { + if (mdss_rev->core_major_ver >= 13) + ops->setup_qos_lut = dpu_hw_wb_setup_qos_lut_v13; + else + ops->setup_qos_lut = dpu_hw_wb_setup_qos_lut; + } if (test_bit(DPU_WB_CDP, &features)) ops->setup_cdp = dpu_hw_wb_setup_cdp; |