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| author | Christophe Parant <c.parant@phytec.fr> | 2026-03-06 12:05:00 +0300 |
|---|---|---|
| committer | Alexandre Torgue <alexandre.torgue@foss.st.com> | 2026-03-06 12:39:46 +0300 |
| commit | c586a772639dee64f9bb0deb8612c4d67d32cdb0 (patch) | |
| tree | 129227b6a40d400631d9338372df026a2bdb0fba | |
| parent | e4c9cc73887eab58368499dcab3c6b7dc04a3102 (diff) | |
| download | linux-c586a772639dee64f9bb0deb8612c4d67d32cdb0.tar.xz | |
ARM: dts: stm32: phyboard-sargas and phycore: Fix coding style issues
- Remove "stm32-pinfunc.h" include as it is already include in
"stm32mp15-pinctrl.dtsi" file.
- reserved-memory: reorder the memory sections (lower to higher
addresses).
- Move vendor properties (go last).
- Remove useless compatible values:
- QSPI flash: remove the winbond compatible. jedec is enought as the
NOR flahses are detectable.
- EEPROM: "atmel,24c32" is enought.
- Use uppercase for regulator-name properties.
- In pmic node: use the names from the PHYTEC SoM schematics.
- stmpe811 touch: fix dts schema to comply with st,stmpe.yaml.
- Fix one "multiple blank lines" detected by checkpatch.
Signed-off-by: Christophe Parant <c.parant@phytec.fr>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp157c-phyboard-sargas-rdk.dts | 1 | ||||
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp15xx-phyboard-sargas.dtsi | 5 | ||||
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi | 65 |
3 files changed, 33 insertions, 38 deletions
diff --git a/arch/arm/boot/dts/st/stm32mp157c-phyboard-sargas-rdk.dts b/arch/arm/boot/dts/st/stm32mp157c-phyboard-sargas-rdk.dts index c90b12a479c9..c18a37266083 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-phyboard-sargas-rdk.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-phyboard-sargas-rdk.dts @@ -6,7 +6,6 @@ /dts-v1/; -#include <dt-bindings/pinctrl/stm32-pinfunc.h> #include "stm32mp157.dtsi" #include "stm32mp15xc.dtsi" #include "stm32mp15xx-phycore-som.dtsi" diff --git a/arch/arm/boot/dts/st/stm32mp15xx-phyboard-sargas.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-phyboard-sargas.dtsi index e9266aeb25d0..20684b497c99 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-phyboard-sargas.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-phyboard-sargas.dtsi @@ -5,7 +5,6 @@ * Author: Dom VOVARD <dom.vovard@linrt.com>. */ - #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/leds/common.h> @@ -159,10 +158,10 @@ &sai2a { dma-names = "rx"; - st,sync = <&sai2b 2>; clocks = <&rcc SAI2_K>, <&sai2b>; clock-names = "sai_ck", "MCLK"; #clock-cells = <0>; + st,sync = <&sai2b 2>; sai2a_port: port { sai2a_endpoint: endpoint { @@ -195,9 +194,9 @@ pinctrl-2 = <&sdmmc1_b4_sleep_pins_b>; cd-gpios = <&gpiof 3 GPIO_ACTIVE_LOW>; disable-wp; - st,neg-edge; bus-width = <4>; vmmc-supply = <&v3v3>; + st,neg-edge; status = "okay"; }; diff --git a/arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi index 3f60f184978c..aafbd83f6cae 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi @@ -36,18 +36,6 @@ #size-cells = <1>; ranges; - retram: retram@38000000 { - compatible = "shared-dma-pool"; - reg = <0x38000000 0x10000>; - no-map; - }; - - mcuram: mcuram@30000000 { - compatible = "shared-dma-pool"; - reg = <0x30000000 0x40000>; - no-map; - }; - mcuram2: mcuram2@10000000 { compatible = "shared-dma-pool"; reg = <0x10000000 0x40000>; @@ -71,11 +59,23 @@ reg = <0x10042000 0x4000>; no-map; }; + + mcuram: mcuram@30000000 { + compatible = "shared-dma-pool"; + reg = <0x30000000 0x40000>; + no-map; + }; + + retram: retram@38000000 { + compatible = "shared-dma-pool"; + reg = <0x38000000 0x10000>; + no-map; + }; }; regulator_vin: regulator { compatible = "regulator-fixed"; - regulator-name = "vin"; + regulator-name = "VIN"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-always-on; @@ -102,11 +102,11 @@ reg = <1>; interrupt-parent = <&gpiog>; interrupts = <12 IRQ_TYPE_EDGE_FALLING>; + enet-phy-lane-no-swap; ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; ti,min-output-impedance; - enet-phy-lane-no-swap; ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>; }; }; @@ -144,7 +144,7 @@ pwr_sw2-supply = <&bst_out>; vddcore: buck1 { - regulator-name = "vddcore"; + regulator-name = "VDD_CORE"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1350000>; regulator-always-on; @@ -152,7 +152,7 @@ }; vdd_ddr: buck2 { - regulator-name = "vdd_ddr"; + regulator-name = "VDD_DDR"; regulator-min-microvolt = <1350000>; regulator-max-microvolt = <1350000>; regulator-always-on; @@ -160,7 +160,7 @@ }; vdd: buck3 { - regulator-name = "vdd"; + regulator-name = "VDD"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; @@ -169,7 +169,7 @@ }; v3v3: buck4 { - regulator-name = "v3v3"; + regulator-name = "VDD_BUCK4"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; @@ -177,7 +177,7 @@ }; v1v8_audio: ldo1 { - regulator-name = "v1v8_audio"; + regulator-name = "VDD_LDO1"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; @@ -186,7 +186,7 @@ }; vdd_eth_2v5: ldo2 { - regulator-name = "dd_eth_2v5"; + regulator-name = "VDD_ETH_2V5"; regulator-min-microvolt = <2500000>; regulator-max-microvolt = <2500000>; regulator-always-on; @@ -195,7 +195,7 @@ }; vtt_ddr: ldo3 { - regulator-name = "vtt_ddr"; + regulator-name = "VTT_DDR"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <750000>; regulator-always-on; @@ -203,12 +203,12 @@ }; vdd_usb: ldo4 { - regulator-name = "vdd_usb"; + regulator-name = "VDD_USB"; interrupts = <IT_CURLIM_LDO4 0>; }; vdda: ldo5 { - regulator-name = "vdda"; + regulator-name = "VDDA"; regulator-min-microvolt = <2900000>; regulator-max-microvolt = <2900000>; interrupts = <IT_CURLIM_LDO5 0>; @@ -216,7 +216,7 @@ }; vdd_eth_1v0: ldo6 { - regulator-name = "vdd_eth_1v0"; + regulator-name = "VDD_ETH_1V0"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; @@ -225,23 +225,23 @@ }; vref_ddr: vref_ddr { - regulator-name = "vref_ddr"; + regulator-name = "VDD_REFDDR"; regulator-always-on; }; bst_out: boost { - regulator-name = "bst_out"; + regulator-name = "BST_OUT"; interrupts = <IT_OCP_BOOST 0>; }; vbus_otg: pwr_sw1 { - regulator-name = "vbus_otg"; + regulator-name = "VBUS_OTG"; interrupts = <IT_OCP_OTG 0>; regulator-active-discharge = <1>; }; vbus_sw: pwr_sw2 { - regulator-name = "vbus_sw"; + regulator-name = "VBUS_SW"; interrupts = <IT_OCP_SWOUT 0>; regulator-active-discharge = <1>; }; @@ -262,8 +262,7 @@ }; i2c4_eeprom: eeprom@50 { - compatible = "microchip,24c32", - "atmel,24c32"; + compatible = "atmel,24c32"; reg = <0x50>; status = "disabled"; }; @@ -312,13 +311,11 @@ status = "disabled"; flash0: flash@0 { - compatible = "winbond,w25q128", "jedec,spi-nor"; + compatible = "jedec,spi-nor"; reg = <0>; spi-rx-bus-width = <4>; spi-max-frequency = <50000000>; m25p,fast-read; - #address-cells = <1>; - #size-cells = <1>; }; }; @@ -342,10 +339,10 @@ non-removable; no-sd; no-sdio; - st,neg-edge; bus-width = <8>; vmmc-supply = <&v3v3>; vqmmc-supply = <&v3v3>; mmc-ddr-3_3v; + st,neg-edge; status = "disabled"; }; |
