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authorPaul Mundt <lethal@linux-sh.org>2007-11-10 13:54:16 +0300
committerPaul Mundt <lethal@linux-sh.org>2008-01-28 07:18:42 +0300
commitc0acca6789281650134cfbbe00fc461e39440446 (patch)
tree7d8208ab58f2b40a764227d90c40f7c95deed2b6
parent48b22cf993cbc8f62c9b4025cfe0cfccd800181a (diff)
downloadlinux-c0acca6789281650134cfbbe00fc461e39440446.tar.xz
sh: SH-5 also uses the ASID cache.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r--include/asm-sh/processor_64.h8
1 files changed, 2 insertions, 6 deletions
diff --git a/include/asm-sh/processor_64.h b/include/asm-sh/processor_64.h
index 5430e437b915..6ad23387d7ba 100644
--- a/include/asm-sh/processor_64.h
+++ b/include/asm-sh/processor_64.h
@@ -54,18 +54,14 @@ struct tlb_info {
struct sh_cpuinfo {
enum cpu_type type;
unsigned long loops_per_jiffy;
+ unsigned long asid_cache;
- char hard_math;
-
- unsigned long *pgd_quick;
- unsigned long *pmd_quick;
- unsigned long *pte_quick;
- unsigned long pgtable_cache_sz;
unsigned int cpu_clock, master_clock, bus_clock, module_clock;
/* Cache info */
struct cache_info icache;
struct cache_info dcache;
+ struct cache_info scache;
/* TLB info */
struct tlb_info itlb;