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| author | Bryan Hinton <bryan@bryanhinton.com> | 2025-09-22 06:58:09 +0300 |
|---|---|---|
| committer | AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2025-10-13 12:34:15 +0300 |
| commit | c0a824edb6bf694a2d5a9eede29e1628f093cb22 (patch) | |
| tree | cef6d0868fc29a372e6314902dad839c2c34d5c4 | |
| parent | e6bd92bb204757a7b1f4b4dc263a82b3985fadd3 (diff) | |
| download | linux-c0a824edb6bf694a2d5a9eede29e1628f093cb22.tar.xz | |
arm64: dts: mediatek: mt7981b: add labels for UART0/1/2 nodes
Add stable labels (uart0, uart1, uart2) to the MT7981B SoC UART nodes so
board DTS files can reference them directly. This change is purely
cosmetic and introduces no functional differences.
Verification: Built dtbs and boot-tested mainline Image+DTB via U-Boot on
MT7981B hardware; decompiled DT shows the uart0 label present and the
serial0 alias (or absolute path) resolves to serial@11002000.
Signed-off-by: Bryan Hinton <bryan@bryanhinton.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt7981b.dtsi | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt7981b.dtsi b/arch/arm64/boot/dts/mediatek/mt7981b.dtsi index 277c11247c13..5dae4a5f03a5 100644 --- a/arch/arm64/boot/dts/mediatek/mt7981b.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7981b.dtsi @@ -94,7 +94,7 @@ #pwm-cells = <2>; }; - serial@11002000 { + uart0: serial@11002000 { compatible = "mediatek,mt7981-uart", "mediatek,mt6577-uart"; reg = <0 0x11002000 0 0x100>; interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; @@ -105,7 +105,7 @@ status = "disabled"; }; - serial@11003000 { + uart1: serial@11003000 { compatible = "mediatek,mt7981-uart", "mediatek,mt6577-uart"; reg = <0 0x11003000 0 0x100>; interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; @@ -116,7 +116,7 @@ status = "disabled"; }; - serial@11004000 { + uart2: serial@11004000 { compatible = "mediatek,mt7981-uart", "mediatek,mt6577-uart"; reg = <0 0x11004000 0 0x100>; interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; |