diff options
| author | Peng Fan <peng.fan@nxp.com> | 2026-03-24 08:44:08 +0300 |
|---|---|---|
| committer | Frank Li <Frank.Li@nxp.com> | 2026-03-27 16:53:19 +0300 |
| commit | c07b414ff2538daee6b055106020cb596e9820cb (patch) | |
| tree | 968488683c637e76475ba410552abc57cf53c4e1 | |
| parent | c045ff8d3d915b76091cb9e37a4f463b1e2e9a98 (diff) | |
| download | linux-c07b414ff2538daee6b055106020cb596e9820cb.tar.xz | |
arm64: dts: imx94: Add V2X/ELE mailbox nodes
Add V2X and ELE Message Unit nodes for i.MX94.
One extra V2X MU which is dedicated for V2X fast crypto engine is not
included, because it requires a new compatible string.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx94.dtsi | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx94.dtsi b/arch/arm64/boot/dts/freescale/imx94.dtsi index 04c562eddc3b..5622c3f3af70 100644 --- a/arch/arm64/boot/dts/freescale/imx94.dtsi +++ b/arch/arm64/boot/dts/freescale/imx94.dtsi @@ -1212,6 +1212,48 @@ }; }; + mailbox@47300000 { + compatible = "fsl,imx95-mu-v2x"; + reg = <0x0 0x47300000 0x0 0x10000>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + #mbox-cells = <2>; + }; + + mailbox@47310000 { + compatible = "fsl,imx95-mu-v2x"; + reg = <0x0 0x47310000 0x0 0x10000>; + interrupts = <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>; + #mbox-cells = <2>; + }; + + mailbox@47330000 { + compatible = "fsl,imx95-mu-v2x"; + reg = <0x0 0x47330000 0x0 0x10000>; + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + #mbox-cells = <2>; + }; + + mailbox@47340000 { + compatible = "fsl,imx95-mu-v2x"; + reg = <0x0 0x47340000 0x0 0x10000>; + interrupts = <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>; + #mbox-cells = <2>; + }; + + mailbox@47350000 { + compatible = "fsl,imx95-mu-v2x"; + reg = <0x0 0x47350000 0x0 0x10000>; + interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; + #mbox-cells = <2>; + }; + + mailbox@47550000 { + compatible = "fsl,imx95-mu-ele"; + reg = <0x0 0x47550000 0x0 0x10000>; + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; + #mbox-cells = <2>; + }; + aips4: bus@49000000 { compatible = "fsl,aips-bus", "simple-bus"; reg = <0x0 0x49000000 0x0 0x800000>; |