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| author | Dmitry Osipenko <digetx@gmail.com> | 2018-04-09 22:28:27 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2018-04-27 12:21:52 +0300 |
| commit | bf3fbdfbec947cdd04b2f2c4bce11534c8786eee (patch) | |
| tree | 148f03b8cc51571af949a890ff912187955c2d35 | |
| parent | 5c8d08f3471265dfd2f6db6d381751848dbf7db3 (diff) | |
| download | linux-bf3fbdfbec947cdd04b2f2c4bce11534c8786eee.tar.xz | |
memory: tegra: Do not handle spurious interrupts
The ISR reads interrupts-enable mask, but doesn't utilize it. Apply the
mask to the interrupt status and don't handle interrupts that MC driver
haven't asked for. Kernel would disable spurious MC IRQ and report the
error. This would happen only in a case of a very severe bug.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
| -rw-r--r-- | drivers/memory/tegra/mc.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c index a4803ac192bb..d2005b995821 100644 --- a/drivers/memory/tegra/mc.c +++ b/drivers/memory/tegra/mc.c @@ -252,8 +252,11 @@ static irqreturn_t tegra_mc_irq(int irq, void *data) unsigned int bit; /* mask all interrupts to avoid flooding */ - status = mc_readl(mc, MC_INTSTATUS); mask = mc_readl(mc, MC_INTMASK); + status = mc_readl(mc, MC_INTSTATUS) & mask; + + if (!status) + return IRQ_NONE; for_each_set_bit(bit, &status, 32) { const char *error = status_names[bit] ?: "unknown"; |