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authorJerome Brunet <jbrunet@baylibre.com>2026-01-14 20:08:52 +0300
committerNeil Armstrong <neil.armstrong@linaro.org>2026-01-15 11:04:25 +0300
commitbe2ff5fdb0e83e32d4ec4e68a69875cec0d14621 (patch)
tree6bbd7a495f6cbe8d6b0fd45daef6d3e4c5fa96ad
parent406706559046eebc09a31e8ae5e78620bfd746fe (diff)
downloadlinux-be2ff5fdb0e83e32d4ec4e68a69875cec0d14621.tar.xz
arm64: dts: amlogic: g12: assign the MMC B and C signal clocks
The amlogic MMC driver operate with the assumption that MMC clock is configured to provide 24MHz. It uses this path for low rates such as 400kHz. Assign the clocks to make sure they are properly configured Fixes: 4759fd87b928 ("arm64: dts: meson: g12a: add mmc nodes") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patch.msgid.link/20260114-amlogic-mmc-clocks-followup-v1-5-a999fafbe0aa@baylibre.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
index ca455f634834..0085612cf735 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
@@ -2443,6 +2443,9 @@
<&clkc CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1";
resets = <&reset RESET_SD_EMMC_B>;
+
+ assigned-clocks = <&clkc CLKID_SD_EMMC_B_CLK0>;
+ assigned-clock-rates = <24000000>;
};
sd_emmc_c: mmc@ffe07000 {
@@ -2455,6 +2458,9 @@
<&clkc CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1";
resets = <&reset RESET_SD_EMMC_C>;
+
+ assigned-clocks = <&clkc CLKID_SD_EMMC_C_CLK0>;
+ assigned-clock-rates = <24000000>;
};
usb: usb@ffe09000 {