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| author | Teresa Remmet <t.remmet@phytec.de> | 2025-12-18 15:00:06 +0300 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2025-12-30 11:44:30 +0300 |
| commit | be1e3ea0cf76f2fa613220253a630308d19ae5d0 (patch) | |
| tree | edad13be5c761eb5f63419d6258f2a6a0c4a643d | |
| parent | eb2f28413e23c219188d3e1a2ce8bca9894f9832 (diff) | |
| download | linux-be1e3ea0cf76f2fa613220253a630308d19ae5d0.tar.xz | |
arm64: dts: imx8mm-phycore-som: Update eth phy impedance
Update the DP83867 ethernet phy impedance settings to
to optimize signal quality and reduce potential signal integrity issues.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi index 3d66c6701342..b764f7734868 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi @@ -83,6 +83,7 @@ enet-phy-lane-no-swap; ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>; ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; + ti,min-output-impedance; ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; reg = <0>; |