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authorCristian Ciocaltea <cristian.ciocaltea@collabora.com>2026-04-28 00:57:25 +0300
committerHeiko Stuebner <heiko@sntech.de>2026-05-05 21:28:40 +0300
commitbb85f4f5541de9abbe7e300e94d58ea888dd3b33 (patch)
tree38f10bd51178d95d57f9a274272088d3595965ae
parentcb3ee61e35a9d60e6410526fec7b74af9be22d88 (diff)
downloadlinux-bb85f4f5541de9abbe7e300e94d58ea888dd3b33.tar.xz
arm64: dts: rockchip: Add frl-enable-gpios to rk3588s-khadas-edge2
The board exposes the GPIO4_B1 pin to control the voltage bias on the HDMI0 data lines. It must be asserted when operating in HDMI 2.1 FRL mode and deasserted for HDMI 1.4/2.0 TMDS mode. Wire up the hdmi0 node to its dedicated GPIO via frl-enable-gpios to allow adjusting the bias when transitioning between TMDS and FRL modes. While at it, remove the duplicated &hdmi0_sound node. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Link: https://patch.msgid.link/20260428-dts-rk-frl-enable-gpios-v2-7-924df9db884a@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts14
1 files changed, 10 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
index 2c22abaf40a8..5afbc593341b 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
@@ -194,6 +194,10 @@
};
&hdmi0 {
+ frl-enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
+ &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
+ pinctrl-names = "default";
status = "okay";
};
@@ -217,10 +221,6 @@
status = "okay";
};
-&hdmi0_sound {
- status = "okay";
-};
-
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0m2_xfer>;
@@ -282,6 +282,12 @@
};
&pinctrl {
+ hdmi {
+ hdmi0_tx_on_h: hdmi0-tx-on-h {
+ rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
vdd_sd {
vdd_sd_en: vdd-sd-en {
rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;