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| author | Hawking Zhang <Hawking.Zhang@amd.com> | 2025-06-12 06:47:58 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2025-12-11 01:39:25 +0300 |
| commit | bb418f99e6174d10f662dae4638837933bc4752d (patch) | |
| tree | b0e8d8d6d214e0db596066b9cdeadb395db02408 | |
| parent | c58d8a6620cf2654bdd0732e85bc351660af4c0c (diff) | |
| download | linux-bb418f99e6174d10f662dae4638837933bc4752d.tar.xz | |
drm/amdgpu: Init compute partition mode for gfx v12_1
Init compute partition mode for gfx v12_1
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c | 34 |
1 files changed, 28 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c index 0f8029f65bbb..12564e3cc7d0 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c @@ -2454,17 +2454,39 @@ static int gfx_v12_1_xcc_cp_resume(struct amdgpu_device *adev, static int gfx_v12_1_cp_resume(struct amdgpu_device *adev) { - int i, r, num_xcc; + int num_xcc, num_xcp, num_xcc_per_xcp; + int r = 0; num_xcc = NUM_XCC(adev->gfx.xcc_mask); + if (amdgpu_sriov_vf(adev)) { + enum amdgpu_gfx_partition mode; - for (i = 0; i < num_xcc; i++) { - r = gfx_v12_1_xcc_cp_resume(adev, i); - if (r) - return r; + mode = amdgpu_xcp_query_partition_mode(adev->xcp_mgr, + AMDGPU_XCP_FL_NONE); + if (mode == AMDGPU_UNKNOWN_COMPUTE_PARTITION_MODE) + return -EINVAL; + if (adev->gfx.funcs && + adev->gfx.funcs->get_xccs_per_xcp) { + num_xcc_per_xcp = adev->gfx.funcs->get_xccs_per_xcp(adev); + adev->gfx.num_xcc_per_xcp = num_xcc_per_xcp; + num_xcp = num_xcc / num_xcc_per_xcp; + } else { + return -EINVAL; + } + r = amdgpu_xcp_init(adev->xcp_mgr, num_xcp, mode); + + } else { + if (amdgpu_xcp_query_partition_mode(adev->xcp_mgr, + AMDGPU_XCP_FL_NONE) == + AMDGPU_UNKNOWN_COMPUTE_PARTITION_MODE) + r = amdgpu_xcp_switch_partition_mode(adev->xcp_mgr, + amdgpu_user_partt_mode); } - return 0; + if (r) + return r; + + return gfx_v12_1_xcc_cp_resume(adev, adev->gfx.xcc_mask); } static int gfx_v12_1_gfxhub_enable(struct amdgpu_device *adev) |