diff options
| author | Damon Ding <damon.ding@rock-chips.com> | 2025-11-10 11:58:20 +0300 |
|---|---|---|
| committer | Luca Ceresoli <luca.ceresoli@bootlin.com> | 2026-03-25 16:05:08 +0300 |
| commit | b97a424b09b33cbec216706a84006fae6ed7084d (patch) | |
| tree | 8494e07191aa0235ab87adb485650065b0cff6ba | |
| parent | 05d09e7f28c8f6e39c54d79fd96643f6faf5dbee (diff) | |
| download | linux-b97a424b09b33cbec216706a84006fae6ed7084d.tar.xz | |
drm/bridge: analogix_dp: Apply DP helper API drm_dp_dpcd_read_link_status()
Use existing DP helper API to read link status related DPCDs.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Link: https://patch.msgid.link/20251110085823.1197472-2-damon.ding@rock-chips.com
Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
| -rw-r--r-- | drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c index b37fb3c3c1dd..1fcdadc2803a 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c @@ -384,13 +384,13 @@ static int analogix_dp_process_clock_recovery(struct analogix_dp_device *dp) { int lane, lane_count, retval; u8 voltage_swing, pre_emphasis, training_lane; - u8 link_status[2], adjust_request[2]; + u8 link_status[DP_LINK_STATUS_SIZE], adjust_request[2]; usleep_range(100, 101); lane_count = dp->link_train.lane_count; - retval = drm_dp_dpcd_read(&dp->aux, DP_LANE0_1_STATUS, link_status, 2); + retval = drm_dp_dpcd_read_link_status(&dp->aux, link_status); if (retval < 0) return retval; @@ -450,13 +450,13 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp) { int lane_count, retval; u32 reg; - u8 link_align, link_status[2], adjust_request[2]; + u8 link_align, link_status[DP_LINK_STATUS_SIZE], adjust_request[2]; usleep_range(400, 401); lane_count = dp->link_train.lane_count; - retval = drm_dp_dpcd_read(&dp->aux, DP_LANE0_1_STATUS, link_status, 2); + retval = drm_dp_dpcd_read_link_status(&dp->aux, link_status); if (retval < 0) return retval; @@ -615,7 +615,7 @@ static int analogix_dp_full_link_train(struct analogix_dp_device *dp, static int analogix_dp_fast_link_train(struct analogix_dp_device *dp) { int ret; - u8 link_align, link_status[2]; + u8 link_align, link_status[DP_LINK_STATUS_SIZE]; analogix_dp_set_link_bandwidth(dp, dp->link_train.link_rate); ret = analogix_dp_wait_pll_locked(dp); @@ -657,8 +657,7 @@ static int analogix_dp_fast_link_train(struct analogix_dp_device *dp) return ret; } - ret = drm_dp_dpcd_read(&dp->aux, DP_LANE0_1_STATUS, link_status, - 2); + ret = drm_dp_dpcd_read_link_status(&dp->aux, link_status); if (ret < 0) { DRM_DEV_ERROR(dp->dev, "Read link status failed %d\n", ret); |