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| author | Jani Nikula <jani.nikula@intel.com> | 2025-09-12 17:48:52 +0300 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2025-09-17 11:29:33 +0300 |
| commit | b478f2035c59fa81c4bdc0ddefbf692b2797676a (patch) | |
| tree | 404a6b547a52a27a76d4529718b5b18976d11951 | |
| parent | e3aae3e40190dcd4a49d927ed10c798c05a5627f (diff) | |
| download | linux-b478f2035c59fa81c4bdc0ddefbf692b2797676a.tar.xz | |
drm/i915: log HPLL frequency similar to CZCLK
With vlv_clock_get_czclk() logging the CZ clock rate when first cached,
do the same for HPLL VCO.
v2: Rebase
Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://lore.kernel.org/r/bfc3082f90cf9f74aa40308e10f20da824b1db55.1757688216.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_display.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index fb1882494543..b49661b4e959 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -155,6 +155,8 @@ int vlv_clock_get_hpll_vco(struct drm_device *drm) vlv_cck_put(drm); i915->hpll_freq = vco_freq[hpll_freq] * 1000; + + drm_dbg_kms(drm, "HPLL frequency: %d kHz\n", i915->hpll_freq); } return i915->hpll_freq; |