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author | Keguang Zhang <keguang.zhang@gmail.com> | 2023-05-12 13:37:23 +0300 |
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committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2023-06-19 18:06:55 +0300 |
commit | b25efff2a63f0d573f409f22e82904db9cc7d577 (patch) | |
tree | 6f3792082488de4e95725d137fa11ddc24409773 | |
parent | 9e130e2be4e7ac54de1ecc3fa424ca7ddfb1a748 (diff) | |
download | linux-b25efff2a63f0d573f409f22e82904db9cc7d577.tar.xz |
dt-bindings: timer: Add Loongson-1 clocksource
Add devicetree binding document for Loongson-1 clocksource.
Signed-off-by: Keguang Zhang <keguang.zhang@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20230512103724.587760-3-keguang.zhang@gmail.com
-rw-r--r-- | Documentation/devicetree/bindings/timer/loongson,ls1x-pwmtimer.yaml | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/timer/loongson,ls1x-pwmtimer.yaml b/Documentation/devicetree/bindings/timer/loongson,ls1x-pwmtimer.yaml new file mode 100644 index 000000000000..ad61ae55850b --- /dev/null +++ b/Documentation/devicetree/bindings/timer/loongson,ls1x-pwmtimer.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/loongson,ls1x-pwmtimer.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Loongson-1 PWM timer + +maintainers: + - Keguang Zhang <keguang.zhang@gmail.com> + +description: + Loongson-1 PWM timer can be used for system clock source + and clock event timers. + +properties: + compatible: + const: loongson,ls1b-pwmtimer + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - interrupts + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/loongson,ls1x-clk.h> + #include <dt-bindings/interrupt-controller/irq.h> + clocksource: timer@1fe5c030 { + compatible = "loongson,ls1b-pwmtimer"; + reg = <0x1fe5c030 0x10>; + + clocks = <&clkc LS1X_CLKID_APB>; + interrupt-parent = <&intc0>; + interrupts = <20 IRQ_TYPE_LEVEL_HIGH>; + }; |