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authorFong, Yan Kei <yan.kei.fong@altera.com>2025-09-11 04:58:09 +0300
committerDinh Nguyen <dinguyen@kernel.org>2025-10-15 06:05:20 +0300
commitb24ecccd1ab012fa2e71d54a2cb4a82235a3df3e (patch)
tree697a737f17a7d9a141e65a9fae32ae0cec704cb9
parent3a8660878839faadb4f1a6dd72c3179c1df56787 (diff)
downloadlinux-b24ecccd1ab012fa2e71d54a2cb4a82235a3df3e.tar.xz
arm64: dts: socfpga: n5x: Add 4-bit SPI bus width
Add spi-tx-bus-width and spi-rx-bus-width properties with value 4 to the n5x device tree. This update configures the SPI controller to use a 4-bit bus width for both transmission and reception, potentially improving SPI throughput and matching the hardware capabilities more closely. Signed-off-by: Fong, Yan Kei <yan.kei.fong@altera.com> Reviewed-by: Khairul Anuar Romli <khairul.anuar.romli@altera.com> Reviewed-by: Matthew Gerlach <matthew.gerlach@altera.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
-rw-r--r--arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts
index 7952c7f47cc2..0034a4897220 100644
--- a/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts
+++ b/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts
@@ -93,6 +93,8 @@
cdns,tsd2d-ns = <50>;
cdns,tchsh-ns = <4>;
cdns,tslch-ns = <4>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
partitions {
compatible = "fixed-partitions";