diff options
| author | Jouni Högander <jouni.hogander@intel.com> | 2025-02-13 09:48:03 +0300 |
|---|---|---|
| committer | Jouni Högander <jouni.hogander@intel.com> | 2025-02-14 09:37:50 +0300 |
| commit | ac76a51ddb5efb875c7c9ca87e002ff0aa4f63d1 (patch) | |
| tree | da6ecaf3ec97311267cc24e557802b11c242c7c2 | |
| parent | fa27fa48061afda49f939fcac6c480f0c4c1fcfd (diff) | |
| download | linux-ac76a51ddb5efb875c7c9ca87e002ff0aa4f63d1.tar.xz | |
drm/i915/display: Ensure we have "Frame Change" event in DSB commit
We may have commit which doesn't have any non-arming plane register
writes. In that case there aren't "Frame Change" event before DSB vblank
evasion which hangs as PIPEDSL register is reading as 0 when PSR state is
SRDENT(PSR1) or DEEP_SLEEP(PSR2). Handle this by ensuring "Frame Change"
event at the begin of DSB commit if using PSR/PR.
v3: dsb_commit as a first parameter
v2: use intel_psr_trigger_frame_change_event
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250213064804.2077127-13-jouni.hogander@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_display.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 00a552d75be2..dccdb20cc6d7 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7740,6 +7740,14 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state, intel_crtc_planes_update_noarm(new_crtc_state->dsb_commit, state, crtc); + /* + * Ensure we have "Frame Change" event when PSR state is + * SRDENT(PSR1) or DEEP_SLEEP(PSR2). Otherwise DSB vblank + * evasion hangs as PIPEDSL is reading as 0. + */ + intel_psr_trigger_frame_change_event(new_crtc_state->dsb_commit, + state, crtc); + intel_dsb_vblank_evade(state, new_crtc_state->dsb_commit); if (intel_crtc_needs_color_update(new_crtc_state)) |