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authorChristian Marangi <ansuelsmth@gmail.com>2024-12-07 00:11:24 +0300
committerViresh Kumar <viresh.kumar@linaro.org>2024-12-23 13:56:44 +0300
commitab16dfb99cb565fb21ddf29320890c7bad35024c (patch)
treeeaf0a23489f6a0eb93af344442d1911316817674
parentf1f010c9d9c62c865d9f54e94075800ba764b4d9 (diff)
downloadlinux-ab16dfb99cb565fb21ddf29320890c7bad35024c.tar.xz
dt-bindings: cpufreq: Document support for Airoha EN7581 CPUFreq
On newer Airoha SoC, CPU Frequency is scaled indirectly with SMC commands to ATF. A virtual clock is exposed. This virtual clock is a get-only clock and is used to expose the current global CPU clock. The frequency info comes by the output of the SMC command that reports the clock in MHz. The SMC sets the CPU clock by providing an index, this is modelled as performance states in a power domain. CPUs can't be individually scaled as the CPU frequency is shared across all CPUs and is global. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
-rw-r--r--Documentation/devicetree/bindings/cpufreq/airoha,en7581-cpufreq.yaml55
1 files changed, 55 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/cpufreq/airoha,en7581-cpufreq.yaml b/Documentation/devicetree/bindings/cpufreq/airoha,en7581-cpufreq.yaml
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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/cpufreq/airoha,en7581-cpufreq.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Airoha EN7581 CPUFreq
+
+maintainers:
+ - Christian Marangi <ansuelsmth@gmail.com>
+
+description: |
+ On newer Airoha SoC, CPU Frequency is scaled indirectly with SMC commands
+ to ATF.
+
+ A virtual clock is exposed. This virtual clock is a get-only clock and
+ is used to expose the current global CPU clock. The frequency info comes
+ by the output of the SMC command that reports the clock in MHz.
+
+ The SMC sets the CPU clock by providing an index, this is modelled as
+ performance states in a power domain.
+
+ CPUs can't be individually scaled as the CPU frequency is shared across
+ all CPUs and is global.
+
+properties:
+ compatible:
+ const: airoha,en7581-cpufreq
+
+ '#clock-cells':
+ const: 0
+
+ '#power-domain-cells':
+ const: 0
+
+ operating-points-v2: true
+
+required:
+ - compatible
+ - '#clock-cells'
+ - '#power-domain-cells'
+ - operating-points-v2
+
+additionalProperties: false
+
+examples:
+ - |
+ performance-domain {
+ compatible = "airoha,en7581-cpufreq";
+
+ operating-points-v2 = <&cpu_smcc_opp_table>;
+
+ #power-domain-cells = <0>;
+ #clock-cells = <0>;
+ };