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| author | Sohil Mehta <sohil.mehta@intel.com> | 2025-02-19 21:41:22 +0300 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2025-03-19 13:19:40 +0300 |
| commit | a8cb451458057295fa251152a0297ece5519850f (patch) | |
| tree | e895d74f827aedd4fd77a90e153d1423c23feb05 | |
| parent | 7e6b0a2e4152f4046af95eeb46f8b4f9b2a7398d (diff) | |
| download | linux-a8cb451458057295fa251152a0297ece5519850f.tar.xz | |
x86/mtrr: Modify a x86_model check to an Intel VFM check
Simplify one of the last few Intel x86_model checks in arch/x86 by
substituting it with a VFM one.
Signed-off-by: Sohil Mehta <sohil.mehta@intel.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Dave Hansen <dave.hansen@linux.intel.com>
Link: https://lore.kernel.org/r/20250219184133.816753-5-sohil.mehta@intel.com
| -rw-r--r-- | arch/x86/kernel/cpu/mtrr/generic.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c index 6be3cade4134..e2c6b471d230 100644 --- a/arch/x86/kernel/cpu/mtrr/generic.c +++ b/arch/x86/kernel/cpu/mtrr/generic.c @@ -13,6 +13,7 @@ #include <asm/processor-flags.h> #include <asm/cacheinfo.h> #include <asm/cpufeature.h> +#include <asm/cpu_device_id.h> #include <asm/hypervisor.h> #include <asm/mshyperv.h> #include <asm/tlbflush.h> @@ -1026,8 +1027,7 @@ int generic_validate_add_page(unsigned long base, unsigned long size, * For Intel PPro stepping <= 7 * must be 4 MiB aligned and not touch 0x70000000 -> 0x7003FFFF */ - if (mtrr_if == &generic_mtrr_ops && boot_cpu_data.x86 == 6 && - boot_cpu_data.x86_model == 1 && + if (mtrr_if == &generic_mtrr_ops && boot_cpu_data.x86_vfm == INTEL_PENTIUM_PRO && boot_cpu_data.x86_stepping <= 7) { if (base & ((1 << (22 - PAGE_SHIFT)) - 1)) { pr_warn("mtrr: base(0x%lx000) is not 4 MiB aligned\n", base); |