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authorImre Deak <imre.deak@intel.com>2026-02-25 19:46:04 +0300
committerImre Deak <imre.deak@intel.com>2026-03-03 18:49:04 +0300
commita6d89d46d32688943ed3a67d109a4a57d8fdb68d (patch)
treeb37c25fce168e64978ae0265fb9c284fb607c6dc
parente55791f5b78d1e2ecba107564e2c7370b8272974 (diff)
downloadlinux-a6d89d46d32688943ed3a67d109a4a57d8fdb68d.tar.xz
drm/i915/dp: Handle the DOWNSTREAM_PORT_STATUS_CHANGED event
Handle the DOWNSTREAM_PORT_STATUS_CHANGED event a branch device can use to indicate the state change of a DFP connector on the branch device. The event is signaled in the DP_LANE_ALIGN_STATUS_UPDATED DPCD register setting a clear-on-read flag and triggering an HPD IRQ. Accordingly keep a cached version of the flag, updating it whenever DP_LANE_ALIGN_STATUS_UPDATED is read. Schedule a full connector detection from the HPD IRQ handler if the cached flag is set and clear the cached flag at the start of detection. Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260225164618.1261368-7-imre.deak@intel.com
-rw-r--r--drivers/gpu/drm/i915/display/intel_display_types.h1
-rw-r--r--drivers/gpu/drm/i915/display/intel_dp.c16
2 files changed, 16 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 8a2b37c7bccf..e189f8c39ccb 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1796,6 +1796,7 @@ struct intel_dp {
int link_rate;
u8 lane_count;
u8 sink_count;
+ bool downstream_port_changed;
bool needs_modeset_retry;
bool use_max_params;
u8 dpcd[DP_RECEIVER_CAP_SIZE];
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 966e652e38d2..73703cd6e1cc 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5556,7 +5556,14 @@ intel_dp_read_link_status(struct intel_dp *intel_dp, u8 link_status[DP_LINK_STAT
err = drm_dp_dpcd_read_phy_link_status(&intel_dp->aux, DP_PHY_DPRX,
link_status);
- return err;
+ if (err)
+ return err;
+
+ if (link_status[DP_LANE_ALIGN_STATUS_UPDATED - DP_LANE0_1_STATUS] &
+ DP_DOWNSTREAM_PORT_STATUS_CHANGED)
+ WRITE_ONCE(intel_dp->downstream_port_changed, true);
+
+ return 0;
}
static bool
@@ -5876,6 +5883,11 @@ intel_dp_short_pulse(struct intel_dp *intel_dp)
intel_dp_check_link_state(intel_dp);
+ if (READ_ONCE(intel_dp->downstream_port_changed)) {
+ WRITE_ONCE(intel_dp->downstream_port_changed, false);
+ reprobe_needed = true;
+ }
+
intel_psr_short_pulse(intel_dp);
if (intel_alpm_get_error(intel_dp)) {
@@ -5901,6 +5913,8 @@ intel_dp_detect_dpcd(struct intel_dp *intel_dp)
if (drm_WARN_ON(display->drm, intel_dp_is_edp(intel_dp)))
return connector_status_connected;
+ WRITE_ONCE(intel_dp->downstream_port_changed, false);
+
intel_lspcon_resume(dig_port);
if (!intel_dp_get_dpcd(intel_dp))