diff options
| author | Imre Deak <imre.deak@intel.com> | 2018-11-02 21:22:00 +0300 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2018-11-07 23:19:24 +0300 |
| commit | a33e1ece777996ddddb1f23a30f8c66422ed0b68 (patch) | |
| tree | fb38ceb40ce267571c37d602135fd1345adc5b54 | |
| parent | 9a64c65083b910b3557b317dc56e1e93063ac350 (diff) | |
| download | linux-a33e1ece777996ddddb1f23a30f8c66422ed0b68.tar.xz | |
drm/i915/icl: Fix power well 2 wrt. DC-off toggling order
To enable DC5/6 power well 2 has to be disabled as for previous
platforms, so fix things up.
Bspec: 4234
Fixes: 67ca07e7ac10 ("drm/i915/icl: Add power well support")
Cc: Animesh Manna <animesh.manna@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181102182200.17219-1-imre.deak@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/intel_runtime_pm.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 6c453366cd24..cda73bf05ed9 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -2791,6 +2791,12 @@ static const struct i915_power_well_desc icl_power_wells[] = { }, }, { + .name = "DC off", + .domains = ICL_DISPLAY_DC_OFF_POWER_DOMAINS, + .ops = &gen9_dc_off_power_well_ops, + .id = DISP_PW_ID_NONE, + }, + { .name = "power well 2", .domains = ICL_PW_2_POWER_DOMAINS, .ops = &hsw_power_well_ops, @@ -2802,12 +2808,6 @@ static const struct i915_power_well_desc icl_power_wells[] = { }, }, { - .name = "DC off", - .domains = ICL_DISPLAY_DC_OFF_POWER_DOMAINS, - .ops = &gen9_dc_off_power_well_ops, - .id = DISP_PW_ID_NONE, - }, - { .name = "power well 3", .domains = ICL_PW_3_POWER_DOMAINS, .ops = &hsw_power_well_ops, |