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| author | Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> | 2026-01-30 23:31:14 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2026-02-19 20:16:11 +0300 |
| commit | a1e0a6b55216820286b31443724b26ed58e96e0b (patch) | |
| tree | 5ed4fd1d766e9f486e909019146b8a32eec2afd3 | |
| parent | 73463e26f7e2adc5e00873a8afb03ddf49fd838f (diff) | |
| download | linux-a1e0a6b55216820286b31443724b26ed58e96e0b.tar.xz | |
drm/amdgpu: Set vmid0 PAGE_TABLE_DEPTH for GFX12.1
GFX12.1 uses 2 level gart table. Set the context register appropriately
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Reviewed-by: Mukul Joshi <mukul.joshi@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c index 7e917eb47a8c..a72770e3d0e9 100644 --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c @@ -395,7 +395,10 @@ static void mmhub_v4_2_0_mid_enable_system_domain(struct amdgpu_device *adev, tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, - PAGE_TABLE_DEPTH, 0); + PAGE_TABLE_DEPTH, adev->gmc.vmid0_page_table_depth); + tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, + PAGE_TABLE_BLOCK_SIZE, + adev->gmc.vmid0_page_table_block_size); tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, RETRY_PERMISSION_OR_INVALID_PAGE_FAULT, 0); WREG32_SOC15(MMHUB, GET_INST(MMHUB, i), |