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authorJames Clark <james.clark@linaro.org>2025-11-28 14:55:18 +0300
committerSuzuki K Poulose <suzuki.poulose@arm.com>2025-12-22 18:30:53 +0300
commita1d19cd2b1a6c41783caa49fc28e89f434673198 (patch)
tree0f94ffda2cfaf3eb8ba7c2c82083f8d016bec991
parent458db6257149f3959469c880de80eba3e2494479 (diff)
downloadlinux-a1d19cd2b1a6c41783caa49fc28e89f434673198.tar.xz
coresight: Interpret ETMv3 config with ATTR_CFG_GET_FLD()
Currently we're programming attr->config directly into ETMCR after some validation. This obscures which fields are being used, and also makes it impossible to move fields around or use other configN fields in the future. Improve it by only reading the fields that are valid and then setting the appropriate ETMCR bits based on each one. The ETMCR_CTXID_SIZE part can be removed as it was never a valid option because it's not in ETM3X_SUPPORTED_OPTIONS. Reviewed-by: Leo Yan <leo.yan@arm.com> Reviewed-by: Mike Leach <mike.leach@linaro.org> Tested-by: Leo Yan <leo.yan@arm.com> Signed-off-by: James Clark <james.clark@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20251128-james-cs-syncfreq-v8-6-4d319764cc58@linaro.org
-rw-r--r--drivers/hwtracing/coresight/coresight-etm3x-core.c24
1 files changed, 13 insertions, 11 deletions
diff --git a/drivers/hwtracing/coresight/coresight-etm3x-core.c b/drivers/hwtracing/coresight/coresight-etm3x-core.c
index a5e809589d3e..4511fc2f8d72 100644
--- a/drivers/hwtracing/coresight/coresight-etm3x-core.c
+++ b/drivers/hwtracing/coresight/coresight-etm3x-core.c
@@ -28,6 +28,7 @@
#include <linux/uaccess.h>
#include <linux/clk.h>
#include <linux/perf_event.h>
+#include <linux/perf/arm_pmu.h>
#include <asm/sections.h>
#include "coresight-etm.h"
@@ -339,21 +340,22 @@ static int etm_parse_event_config(struct etm_drvdata *drvdata,
if (attr->config & ~ETM3X_SUPPORTED_OPTIONS)
return -EINVAL;
- config->ctrl = attr->config;
+ config->ctrl = 0;
- /* Don't trace contextID when runs in non-root PID namespace */
- if (!task_is_in_init_pid_ns(current))
- config->ctrl &= ~ETMCR_CTXID_SIZE;
+ if (ATTR_CFG_GET_FLD(attr, cycacc))
+ config->ctrl |= ETMCR_CYC_ACC;
+
+ if (ATTR_CFG_GET_FLD(attr, timestamp))
+ config->ctrl |= ETMCR_TIMESTAMP_EN;
/*
- * Possible to have cores with PTM (supports ret stack) and ETM
- * (never has ret stack) on the same SoC. So if we have a request
- * for return stack that can't be honoured on this core then
- * clear the bit - trace will still continue normally
+ * Possible to have cores with PTM (supports ret stack) and ETM (never
+ * has ret stack) on the same SoC. So only enable when it can be honored
+ * - trace will still continue normally otherwise.
*/
- if ((config->ctrl & ETMCR_RETURN_STACK) &&
- !(drvdata->etmccer & ETMCCER_RETSTACK))
- config->ctrl &= ~ETMCR_RETURN_STACK;
+ if (ATTR_CFG_GET_FLD(attr, retstack) &&
+ (drvdata->etmccer & ETMCCER_RETSTACK))
+ config->ctrl |= ETMCR_RETURN_STACK;
return 0;
}