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authorAndrew Jones <ajones@ventanamicro.com>2025-03-04 15:00:23 +0300
committerAlexandre Ghiti <alexghiti@rivosinc.com>2025-03-19 17:23:31 +0300
commit9fe58530a8cd1402aaa35cad19143777a6f65393 (patch)
tree0f087eaf7e034fe3c56b8a4f752e0c2646a3d285
parentaecb09e091dc143345a9e4b282d0444554445f4b (diff)
downloadlinux-9fe58530a8cd1402aaa35cad19143777a6f65393.tar.xz
Documentation/kernel-parameters: Add riscv unaligned speed parameters
Document riscv parameters used to select scalar and vector unaligned access speeds. Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Link: https://lore.kernel.org/r/20250304120014.143628-18-ajones@ventanamicro.com Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
-rw-r--r--Documentation/admin-guide/kernel-parameters.txt16
1 files changed, 16 insertions, 0 deletions
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index fb8752b42ec8..9e3c5fecfa52 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -7477,6 +7477,22 @@
Note that genuine overcurrent events won't be
reported either.
+ unaligned_scalar_speed=
+ [RISCV]
+ Format: {slow | fast | unsupported}
+ Allow skipping scalar unaligned access speed tests. This
+ is useful for testing alternative code paths and to skip
+ the tests in environments where they run too slowly. All
+ CPUs must have the same scalar unaligned access speed.
+
+ unaligned_vector_speed=
+ [RISCV]
+ Format: {slow | fast | unsupported}
+ Allow skipping vector unaligned access speed tests. This
+ is useful for testing alternative code paths and to skip
+ the tests in environments where they run too slowly. All
+ CPUs must have the same vector unaligned access speed.
+
unknown_nmi_panic
[X86] Cause panic on unknown NMI.