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| author | Paul Kocialkowski <paul.kocialkowski@bootlin.com> | 2026-05-18 18:33:36 +0300 |
|---|---|---|
| committer | Chen-Yu Tsai <wens@kernel.org> | 2026-06-09 16:31:38 +0300 |
| commit | 9e8019bd2f55ecd47efa15f7ab4fa49a919d96c5 (patch) | |
| tree | 5a289d713327c94afd1c9c66b71336452e089cf5 | |
| parent | 64659ee650018e0120ad4ed56160f346ac76dc17 (diff) | |
| download | linux-9e8019bd2f55ecd47efa15f7ab4fa49a919d96c5.tar.xz | |
ARM: dts: sun8i: a83t: Add MIPI CSI-2 controller node
MIPI CSI-2 is supported on the A83T with a dedicated controller that
covers both the protocol and D-PHY. It is connected to the only CSI
receiver with a fwnode graph link. Note that the CSI receiver supports
both this MIPI CSI-2 source and a parallel source.
An empty port with a label for the MIPI CSI-2 sensor input is also
defined for convenience.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://patch.msgid.link/20260518153339.619947-8-paulk@sys-base.io
Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
| -rw-r--r-- | arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi b/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi index 6f88d8764e6a..cc107c6030de 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi @@ -1062,6 +1062,49 @@ clock-names = "bus", "mod", "ram"; resets = <&ccu RST_BUS_CSI>; status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + csi_in_mipi_csi2: endpoint { + remote-endpoint = <&mipi_csi2_out_csi>; + }; + }; + }; + }; + + mipi_csi2: csi@1cb1000 { + compatible = "allwinner,sun8i-a83t-mipi-csi2"; + reg = <0x01cb1000 0x1000>; + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_CSI>, + <&ccu CLK_CSI_SCLK>, + <&ccu CLK_MIPI_CSI>, + <&ccu CLK_CSI_MISC>; + clock-names = "bus", "mod", "mipi", "misc"; + resets = <&ccu RST_BUS_CSI>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + mipi_csi2_in: port@0 { + reg = <0>; + }; + + mipi_csi2_out: port@1 { + reg = <1>; + + mipi_csi2_out_csi: endpoint { + remote-endpoint = <&csi_in_mipi_csi2>; + }; + }; + }; }; hdmi: hdmi@1ee0000 { |